through (nonmatching) sub_800EFB0

This commit is contained in:
PikalaxALT 2017-12-10 10:23:43 -05:00
parent 253b3c2fa5
commit beeb86be37
3 changed files with 146 additions and 223 deletions

View file

@ -5,225 +5,6 @@
.text
thumb_func_start sub_800EE78
sub_800EE78: @ 800EE78
push {lr}
ldr r0, =sub_800E748
movs r1, 0x1
bl CreateTask
ldr r1, =gUnknown_03005000
adds r1, 0x67
strb r0, [r1]
pop {r0}
bx r0
.pool
thumb_func_end sub_800EE78
thumb_func_start sub_800EE94
sub_800EE94: @ 800EE94
push {lr}
ldr r1, =gUnknown_03005000
ldrh r0, [r1, 0x4]
cmp r0, 0x7
bne _0800EEB4
ldr r2, =0x00000ccd
adds r0, r1, r2
ldrb r0, [r0]
cmp r0, 0
beq _0800EEB4
movs r0, 0x1
b _0800EEB6
.pool
_0800EEB4:
movs r0, 0
_0800EEB6:
pop {r1}
bx r1
thumb_func_end sub_800EE94
thumb_func_start sub_800EEBC
sub_800EEBC: @ 800EEBC
push {r4,lr}
ldr r4, =gUnknown_03005000
ldrh r0, [r4, 0x4]
cmp r0, 0x7
bne _0800EEF8
ldr r0, =gUnknown_03007890
ldr r1, [r0]
ldr r2, =0x00000c3d
adds r0, r4, r2
ldrb r0, [r0]
lsls r0, 5
adds r1, r0
ldrh r0, [r1, 0x14]
movs r1, 0xF0
bl sub_800C12C
lsls r0, 24
cmp r0, 0
bne _0800EEF8
movs r0, 0x9
strh r0, [r4, 0x4]
movs r0, 0x1
b _0800EEFA
.pool
_0800EEF8:
movs r0, 0
_0800EEFA:
pop {r4}
pop {r1}
bx r1
thumb_func_end sub_800EEBC
thumb_func_start sub_800EF00
sub_800EF00: @ 800EF00
push {lr}
ldr r0, =sub_800E94C
movs r1, 0x1
bl CreateTask
ldr r1, =gUnknown_03005000
adds r1, 0x67
strb r0, [r1]
pop {r0}
bx r0
.pool
thumb_func_end sub_800EF00
thumb_func_start sub_800EF1C
sub_800EF1C: @ 800EF1C
push {lr}
ldr r0, =gUnknown_03004140
ldrb r0, [r0]
cmp r0, 0
bne _0800EF30
movs r0, 0
b _0800EF32
.pool
_0800EF30:
movs r0, 0x1
_0800EF32:
pop {r1}
bx r1
thumb_func_end sub_800EF1C
thumb_func_start sub_800EF38
sub_800EF38: @ 800EF38
ldr r1, =gUnknown_03005000
movs r0, 0x4
strh r0, [r1, 0x4]
ldr r0, =gUnknown_03004140
ldrb r0, [r0]
ldr r2, =0x00000ce7
adds r1, r2
strb r0, [r1]
bx lr
.pool
thumb_func_end sub_800EF38
thumb_func_start sub_800EF58
sub_800EF58: @ 800EF58
push {lr}
adds r1, r0, 0
ldr r2, =gUnknown_03005000
ldrh r0, [r2, 0x4]
cmp r0, 0x11
beq _0800EF68
cmp r1, 0
beq _0800EF74
_0800EF68:
movs r0, 0x12
strh r0, [r2, 0x4]
movs r0, 0x1
b _0800EF76
.pool
_0800EF74:
movs r0, 0
_0800EF76:
pop {r1}
bx r1
thumb_func_end sub_800EF58
thumb_func_start sub_800EF7C
sub_800EF7C: @ 800EF7C
ldr r1, =gUnknown_03005000
movs r0, 0xE
strh r0, [r1, 0x4]
bx lr
.pool
thumb_func_end sub_800EF7C
thumb_func_start sub_800EF88
sub_800EF88: @ 800EF88
push {lr}
lsls r0, 24
lsrs r1, r0, 24
movs r2, 0
b _0800EF9A
_0800EF92:
lsrs r1, 1
adds r0, r2, 0x1
lsls r0, 24
lsrs r2, r0, 24
_0800EF9A:
cmp r2, 0x3
bhi _0800EFAC
movs r0, 0x1
ands r0, r1
cmp r0, 0
beq _0800EF92
adds r0, r2, 0
bl rfu_UNI_readySendData
_0800EFAC:
pop {r0}
bx r0
thumb_func_end sub_800EF88
thumb_func_start sub_800EFB0
sub_800EFB0: @ 800EFB0
push {r4-r7,lr}
sub sp, 0x4
movs r2, 0
ldr r7, =gRecvCmds
ldr r0, =gUnknown_03005000
adds r6, r7, 0
ldr r1, =0x00000c87
adds r5, r0, r1
_0800EFC0:
movs r3, 0
lsls r0, r2, 3
lsls r1, r2, 4
adds r4, r2, 0x1
subs r0, r2
lsls r0, 1
adds r2, r0, r5
adds r1, r6
_0800EFD0:
ldrh r0, [r1]
lsrs r0, 8
strb r0, [r2, 0x1]
ldrh r0, [r1]
strb r0, [r2]
adds r2, 0x2
adds r1, 0x2
adds r3, 0x1
cmp r3, 0x6
ble _0800EFD0
adds r2, r4, 0
cmp r2, 0x4
ble _0800EFC0
movs r0, 0
mov r1, sp
strh r0, [r1]
ldr r2, =0x01000028
mov r0, sp
adds r1, r7, 0
bl CpuSet
add sp, 0x4
pop {r4-r7}
pop {r0}
bx r0
.pool
thumb_func_end sub_800EFB0
thumb_func_start sub_800F014
sub_800F014: @ 800F014
push {lr}

View file

@ -154,12 +154,14 @@ struct UnkRfuStruct_2 {
/* 0x124 */ struct UnkRfuStruct_2_Sub_124 unk_124;
/* 0x9e8 */ struct UnkRfuStruct_2_Sub_9e8 unk_9e8;
/* 0xc1c */ struct UnkRfuStruct_2_Sub_c1c unk_c1c;
/* 0xc3c */ u8 filler_c3c[2];
/* 0xc3c */ u8 unk_c3c;
/* 0xc3d */ u8 unk_c3d;
/* 0xc3e */ vu8 unk_c3e;
/* 0xc3f */ u8 unk_c3f[70];
/* 0xc85 */ u8 filler_c85[2];
/* 0xc87 */ u8 unk_c87[70];
/* 0xccb */ u8 filler_ccd[3];
/* 0xc87 */ u8 unk_c87[5][7][2];
/* 0xccd */ u8 unk_ccd;
/* 0xcce */ u8 filler_cce[2];
/* 0xcd0 */ vu8 unk_cd0;
/* 0xcd1 */ u8 filler_cd1[9];
/* 0xcda */ u8 unk_cda;
@ -169,7 +171,8 @@ struct UnkRfuStruct_2 {
/* 0xce2 */ u8 unk_ce2;
/* 0xce2 */ u8 unk_ce3;
/* 0xce4 */ u8 unk_ce4;
/* 0xce5 */ u8 filler_ce5[3];
/* 0xce5 */ u8 filler_ce5[2];
/* 0xce7 */ u8 unk_ce7;
/* 0xce8 */ u8 unk_ce8;
/* 0xce9 */ u8 filler_ce9[11];
}; // size = 0xcf4

View file

@ -2790,3 +2790,142 @@ void sub_800EDD4(void)
}
}
}
void sub_800EE78(void)
{
gUnknown_03005000.unk_67 = CreateTask(sub_800E748, 1);
}
bool8 sub_800EE94(void)
{
if (gUnknown_03005000.unk_04 == 7 && gUnknown_03005000.unk_ccd)
{
return TRUE;
}
return FALSE;
}
bool8 sub_800EEBC(void)
{
if (gUnknown_03005000.unk_04 == 7 && !sub_800C12C(gUnknown_03007890->unk_14[gUnknown_03005000.unk_c3d].unk_00, 240))
{
gUnknown_03005000.unk_04 = 9;
return TRUE;
}
return FALSE;
}
void sub_800EF00(void)
{
gUnknown_03005000.unk_67 = CreateTask(sub_800E94C, 1);
}
bool8 sub_800EF1C(void)
{
if (gUnknown_03004140.unk_00)
{
return TRUE;
}
return FALSE;
}
void sub_800EF38(void)
{
gUnknown_03005000.unk_04 = 4;
gUnknown_03005000.unk_ce7 = gUnknown_03004140.unk_00;
}
bool8 sub_800EF58(bool32 a0)
{
if (gUnknown_03005000.unk_04 == 17 || a0)
{
gUnknown_03005000.unk_04 = 18;
return TRUE;
}
return FALSE;
}
void sub_800EF7C(void)
{
gUnknown_03005000.unk_04 = 14;
}
void sub_800EF88(u8 a0)
{
u8 i;
for (i = 0; i < 4; i++)
{
if (a0 & 1)
{
rfu_UNI_readySendData(i);
break;
}
a0 >>= 1;
}
}
#ifdef NONMATCHING
// FIXME: gUnknown_03005000.unk_c87 should be in r5
// FIXME: gRecvCmds should be in r6 and r7
void sub_800EFB0(void)
{
int i, j;
for (i = 0; i < 5; i++)
{
for (j = 0; j < 7; j++)
{
gUnknown_03005000.unk_c87[i][j][1] = gRecvCmds[i][j] >> 8;
gUnknown_03005000.unk_c87[i][j][0] = gRecvCmds[i][j];
}
}
CpuFill16(0, gRecvCmds, sizeof gRecvCmds);
}
#else
__attribute__((naked)) void sub_800EFB0(void)
{
asm_unified("\tpush {r4-r7,lr}\n"
"\tsub sp, 0x4\n"
"\tmovs r2, 0\n"
"\tldr r7, =gRecvCmds\n"
"\tldr r0, =gUnknown_03005000\n"
"\tadds r6, r7, 0\n"
"\tldr r1, =0x00000c87\n"
"\tadds r5, r0, r1\n"
"_0800EFC0:\n"
"\tmovs r3, 0\n"
"\tlsls r0, r2, 3\n"
"\tlsls r1, r2, 4\n"
"\tadds r4, r2, 0x1\n"
"\tsubs r0, r2\n"
"\tlsls r0, 1\n"
"\tadds r2, r0, r5\n"
"\tadds r1, r6\n"
"_0800EFD0:\n"
"\tldrh r0, [r1]\n"
"\tlsrs r0, 8\n"
"\tstrb r0, [r2, 0x1]\n"
"\tldrh r0, [r1]\n"
"\tstrb r0, [r2]\n"
"\tadds r2, 0x2\n"
"\tadds r1, 0x2\n"
"\tadds r3, 0x1\n"
"\tcmp r3, 0x6\n"
"\tble _0800EFD0\n"
"\tadds r2, r4, 0\n"
"\tcmp r2, 0x4\n"
"\tble _0800EFC0\n"
"\tmovs r0, 0\n"
"\tmov r1, sp\n"
"\tstrh r0, [r1]\n"
"\tldr r2, =0x01000028\n"
"\tmov r0, sp\n"
"\tadds r1, r7, 0\n"
"\tbl CpuSet\n"
"\tadd sp, 0x4\n"
"\tpop {r4-r7}\n"
"\tpop {r0}\n"
"\tbx r0\n"
"\t.pool");
}
#endif