through sub_800D294; fix sub_800CF34
This commit is contained in:
parent
295e45c788
commit
c906978692
3 changed files with 89 additions and 452 deletions
135
asm/link_rfu.s
135
asm/link_rfu.s
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@ -5,141 +5,6 @@
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.text
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thumb_func_start sub_800D20C
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sub_800D20C: @ 800D20C
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push {r4,r5,lr}
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ldr r5, =gUnknown_03004140
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ldrb r0, [r5, 0x4]
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cmp r0, 0xF
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bne _0800D258
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ldr r1, =gUnknown_03007880
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ldrb r2, [r5, 0x10]
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lsls r0, r2, 2
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adds r0, r1
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ldr r0, [r0]
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ldrh r0, [r0]
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cmp r0, 0x26
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bne _0800D258
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movs r4, 0
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strb r4, [r5, 0x5]
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strb r4, [r5, 0x4]
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movs r0, 0x4
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adds r1, r2, 0
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bl rfu_clearSlot
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adds r2, r5, 0
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adds r2, 0x24
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movs r1, 0x1
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ldrb r0, [r5, 0x10]
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lsls r1, r0
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ldrb r0, [r2]
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bics r0, r1
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strb r0, [r2]
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ldrb r0, [r5, 0x10]
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lsls r0, 1
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adds r1, r5, 0
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adds r1, 0x28
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adds r0, r1
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strh r4, [r0]
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movs r0, 0x24
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movs r1, 0
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bl sub_800D30C
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_0800D258:
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pop {r4,r5}
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pop {r0}
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bx r0
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.pool
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thumb_func_end sub_800D20C
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thumb_func_start sub_800D268
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sub_800D268: @ 800D268
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push {lr}
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ldr r1, =gUnknown_03004140
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ldrb r0, [r1, 0x6]
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cmp r0, 0
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bne _0800D28C
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ldrb r0, [r1, 0xA]
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cmp r0, 0x1
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bne _0800D28C
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ldrb r0, [r1, 0x4]
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strb r0, [r1, 0x11]
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ldrb r0, [r1, 0x5]
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strb r0, [r1, 0x12]
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movs r0, 0x10
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strb r0, [r1, 0x4]
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movs r0, 0x11
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strb r0, [r1, 0x5]
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movs r0, 0x2
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strb r0, [r1, 0xA]
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_0800D28C:
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pop {r0}
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bx r0
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.pool
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thumb_func_end sub_800D268
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thumb_func_start sub_800D294
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sub_800D294: @ 800D294
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push {r4-r7,lr}
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mov r7, r10
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mov r6, r9
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mov r5, r8
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push {r5-r7}
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movs r6, 0
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movs r5, 0
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ldr r1, =gUnknown_03007890
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ldr r0, [r1]
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ldrb r0, [r0, 0x8]
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cmp r6, r0
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bcs _0800D2F0
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mov r8, r0
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ldr r0, =gUnknown_03004140
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mov r10, r0
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mov r9, r1
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_0800D2B4:
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mov r1, r10
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ldr r3, [r1, 0x20]
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ldrh r2, [r3]
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adds r0, r5, 0x1
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mov r12, r0
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ldr r1, =0x0000ffff
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cmp r2, r1
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beq _0800D2E6
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mov r1, r9
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ldr r0, [r1]
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lsls r1, r5, 5
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adds r0, r1
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ldrh r4, [r0, 0x18]
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ldr r7, =0x0000ffff
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movs r1, 0x1
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lsls r1, r5
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_0800D2D4:
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cmp r4, r2
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bne _0800D2DE
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orrs r6, r1
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lsls r0, r6, 24
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lsrs r6, r0, 24
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_0800D2DE:
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adds r3, 0x2
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ldrh r2, [r3]
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cmp r2, r7
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bne _0800D2D4
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_0800D2E6:
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mov r1, r12
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lsls r0, r1, 24
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lsrs r5, r0, 24
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cmp r5, r8
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bcc _0800D2B4
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_0800D2F0:
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adds r0, r6, 0
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pop {r3-r5}
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mov r8, r3
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mov r9, r4
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mov r10, r5
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pop {r4-r7}
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pop {r1}
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bx r1
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.pool
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thumb_func_end sub_800D294
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thumb_func_start sub_800D30C
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sub_800D30C: @ 800D30C
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push {r4,lr}
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@ -132,6 +132,14 @@ struct RfuUnk3
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u32 unk_dc;
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};
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struct RfuUnkSub
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{
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u16 unk_00;
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u8 unk_02;
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u16 unk_04;
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u8 filler_06[26];
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};
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struct RfuUnk5
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{
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u8 unk_00;
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@ -144,9 +152,7 @@ struct RfuUnk5
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u8 unk_07;
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u8 unk_08;
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u8 filler_09[11];
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u16 unk_14;
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u8 filler_16[2];
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u16 unk_18[4];
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struct RfuUnkSub unk_14[4];
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};
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extern struct RfuStruct *gRfuState;
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394
src/link_rfu.c
394
src/link_rfu.c
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@ -23,19 +23,19 @@ EWRAM_DATA struct UnkLinkRfuStruct_02022B2C gUnknown_02022B2C = {};
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// Static ROM declarations
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void sub_800C000(void);
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static void sub_800C000(void);
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void sub_800CEB0(u16 r6);
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void sub_800C7B4(u16 r8, u16 r6);
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void sub_800D30C(u8 a0, u8 a1);
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void sub_800D334(u8 a0);
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void sub_800D610(void);
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void sub_800D630(void);
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void sub_800C744(u32 a0);
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void sub_800CF34(void);
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static void sub_800C744(u32 a0);
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static void sub_800CF34(void);
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static void sub_800D158(void);
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void sub_800D20C(void);
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void sub_800D268(void);
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u8 sub_800D294(void);
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static void sub_800D20C(void);
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static void sub_800D268(void);
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static u8 sub_800D294(void);
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void sub_800D358(void);
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void sub_800D434(void);
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@ -69,7 +69,7 @@ u32 sub_800BEC0(void)
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void rfu_REQ_sendData_wrapper(u8 r2)
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{
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u8 val;
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if (!gUnknown_03007890[0].unk_00)
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if (!gUnknown_03007890->unk_00)
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{
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val = gUnknown_03004140.unk_02;
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r2 = 0;
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@ -121,7 +121,7 @@ void sub_800BFCC(struct UnkLinkRfuStruct_02022B2C *unk0)
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}
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}
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void sub_800C000(void)
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static void sub_800C000(void)
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{
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u8 i;
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@ -221,15 +221,14 @@ u8 sub_800C12C(u16 r6, u16 r8)
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sub_800D30C(0xF3, 0x01);
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return 2;
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}
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for (i = 0; i < gUnknown_03007890[0].unk_08; i++)
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for (i = 0; i < gUnknown_03007890->unk_08; i++)
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{
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tmp = &gUnknown_03007890[i];
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if (tmp->unk_14 == r6)
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if (gUnknown_03007890->unk_14[i].unk_00 == r6)
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{
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break;
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}
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}
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if (gUnknown_03007890[0].unk_08 == 0 || i == gUnknown_03007890[0].unk_08)
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if (gUnknown_03007890->unk_08 == 0 || i == gUnknown_03007890->unk_08)
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{
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gUnknown_03004140.unk_14 = 3;
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sub_800D30C(0xF3, 0x01);
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@ -268,7 +267,7 @@ void sub_800C210(u8 a0)
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gUnknown_03004140.unk_34[i] = 0;
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}
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}
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i = gUnknown_03007890[0].unk_03 & a0;
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i = gUnknown_03007890->unk_03 & a0;
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if (i)
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{
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sub_800D334(i);
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@ -337,8 +336,8 @@ void sub_800C27C(bool8 a0)
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case 16:
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gUnknown_03004140.unk_04 = gUnknown_03004140.unk_11;
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gUnknown_03004140.unk_05 = gUnknown_03004140.unk_12;
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sub_800D334(gUnknown_03007890[0].unk_03);
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gUnknown_03004140.unk_14 = gUnknown_03007890[0].unk_03;
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sub_800D334(gUnknown_03007890->unk_03);
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gUnknown_03004140.unk_14 = gUnknown_03007890->unk_03;
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sub_800D30C(0x33, 0x01);
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return;
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case 17:
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@ -410,7 +409,7 @@ bool8 sub_800C36C(u16 a0)
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}
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sub_800D610();
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}
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if (gUnknown_03007890[0].unk_00 == 1)
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if (gUnknown_03007890->unk_00 == 1)
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{
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if (sp2)
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{
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@ -541,7 +540,7 @@ void sub_800C54C(u32 a0)
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case 15:
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break;
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case 16:
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rfu_REQ_CHILD_startConnectRecovery(gUnknown_03007890[0].unk_03);
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rfu_REQ_CHILD_startConnectRecovery(gUnknown_03007890->unk_03);
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break;
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case 17:
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rfu_REQ_CHILD_pollConnectRecovery();
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@ -564,7 +563,7 @@ void sub_800C54C(u32 a0)
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gUnknown_03004140.unk_0e = 0;
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}
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} while (gUnknown_03004140.unk_04 == 18 || gUnknown_03004140.unk_04 == 19);
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if (gUnknown_03007890[0].unk_00 != 1 || !sub_800C36C(0))
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if (gUnknown_03007890->unk_00 != 1 || !sub_800C36C(0))
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{
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sub_800CF34();
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sub_800D158();
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@ -574,7 +573,7 @@ void sub_800C54C(u32 a0)
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}
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}
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void sub_800C744(u32 a0)
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static void sub_800C744(u32 a0)
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{
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if (gUnknown_03004140.unk_07 == 5)
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{
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@ -690,7 +689,7 @@ void sub_800C7B4(u16 r8, u16 r6)
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{
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sub_800D30C(0x20, 0x01);
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}
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if (gUnknown_03004140.unk_0b && gUnknown_03004140.unk_1a != 1 && gUnknown_03007890[0].unk_08 == 4)
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if (gUnknown_03004140.unk_0b && gUnknown_03004140.unk_1a != 1 && gUnknown_03007890->unk_08 == 4)
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{
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rfu_REQ_endSearchParent();
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rfu_waitREQComplete();
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@ -766,11 +765,11 @@ void sub_800C7B4(u16 r8, u16 r6)
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case 50:
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if (r6 == 0)
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{
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gUnknown_03004140.unk_14 = gUnknown_03007890[0].unk_03;
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gUnknown_03004140.unk_14 = gUnknown_03007890->unk_03;
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gUnknown_03004140.unk_04 = gUnknown_03004140.unk_05 = 17;
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for (gUnknown_03004140.unk_10 = 0; gUnknown_03004140.unk_10 < 4; gUnknown_03004140.unk_10 ++)
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{
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if ((gUnknown_03007890[0].unk_03 >> gUnknown_03004140.unk_10) & 1)
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if ((gUnknown_03007890->unk_03 >> gUnknown_03004140.unk_10) & 1)
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{
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break;
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}
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@ -799,7 +798,7 @@ void sub_800C7B4(u16 r8, u16 r6)
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else
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{
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gUnknown_03004140.unk_04 = gUnknown_03004140.unk_05 = 0;
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sub_800D334(gUnknown_03007890[0].unk_03);
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sub_800D334(gUnknown_03007890->unk_03);
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gUnknown_03004140.unk_1e = 0x33;
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}
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gUnknown_03004140.unk_34[gUnknown_03004140.unk_10] = 0;
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@ -833,7 +832,7 @@ void sub_800C7B4(u16 r8, u16 r6)
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{
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gUnknown_03004140.unk_04 = gUnknown_03004140.unk_05 = 0;
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sub_800D610();
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sub_800D334(gUnknown_03007890[0].unk_02 | gUnknown_03007890[0].unk_03);
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sub_800D334(gUnknown_03007890->unk_02 | gUnknown_03007890->unk_03);
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gUnknown_03004140.unk_14 = sp0;
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sub_800D30C(0x25, 0x01);
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}
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@ -855,10 +854,10 @@ void sub_800C7B4(u16 r8, u16 r6)
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rfu_REQ_RFUStatus();
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rfu_waitREQComplete();
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rfu_getRFUStatus(&sp0);
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if (sp0 == 0 && gUnknown_03007890[0].unk_00 == 0)
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if (sp0 == 0 && gUnknown_03007890->unk_00 == 0)
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{
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stwiRecvBuffer = rfu_getSTWIRecvBuffer();
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stwiRecvBuffer[4] = gUnknown_03007890[0].unk_02;
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stwiRecvBuffer[4] = gUnknown_03007890->unk_02;
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stwiRecvBuffer[5] = 1;
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sub_800C36C(0x29);
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r6 = 0;
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@ -898,7 +897,7 @@ void sub_800C7B4(u16 r8, u16 r6)
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gUnknown_03004140.unk_00 &= ~gUnknown_03004140.unk_14;
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if (gUnknown_03004140.unk_07)
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{
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if (gUnknown_03007890[0].unk_00 == 0xFF)
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if (gUnknown_03007890->unk_00 == 0xFF)
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{
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if (gUnknown_03004140.unk_07 == 8)
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{
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@ -913,7 +912,7 @@ void sub_800C7B4(u16 r8, u16 r6)
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}
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}
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}
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if (gUnknown_03007890[0].unk_00 == 0xFF)
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if (gUnknown_03007890->unk_00 == 0xFF)
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{
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if (gUnknown_03004140.unk_04 == 0)
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{
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@ -928,7 +927,7 @@ void sub_800C7B4(u16 r8, u16 r6)
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break;
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case 38:
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sub_800D20C();
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if (gUnknown_03007890[0].unk_00 != 0xFF)
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if (gUnknown_03007890->unk_00 != 0xFF)
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{
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sub_800D30C(0x50, 0x00);
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}
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@ -953,8 +952,8 @@ void sub_800C7B4(u16 r8, u16 r6)
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{
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if (r8 == 28 && r6 != 0 && gUnknown_03004140.unk_07 == 4)
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{
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gUnknown_03007890[0].unk_00 = 1;
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gUnknown_03007890[0].unk_02 = 15;
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gUnknown_03007890->unk_00 = 1;
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gUnknown_03007890->unk_02 = 15;
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sub_800D334(15);
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rfu_waitREQComplete();
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return;
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@ -986,7 +985,7 @@ void sub_800CEB0(u16 r6)
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r7 = gUnknown_03004140.unk_0e;
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gUnknown_03004140.unk_0e = 0;
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gUnknown_03004140.unk_0f = 1;
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if (gUnknown_03007890[0].unk_00 == 0)
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if (gUnknown_03007890->unk_00 == 0)
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{
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sub_800C36C(r6);
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if (gUnknown_03004140.unk_02 != 1)
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@ -1017,8 +1016,7 @@ void sub_800CEB0(u16 r6)
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gUnknown_03004140.unk_0e = r7;
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}
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#ifdef NONMATCHING
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void sub_800CF34(void)
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static void sub_800CF34(void)
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{
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u8 flags;
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u8 sp0;
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@ -1029,8 +1027,8 @@ void sub_800CF34(void)
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if (gUnknown_03004140.unk_04 == 5 || gUnknown_03004140.unk_04 == 6 || gUnknown_03004140.unk_04 == 7 || gUnknown_03004140.unk_04 == 8)
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{
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flags = ((gUnknown_03007890[0].unk_02 ^ gUnknown_03004140.unk_0c) & gUnknown_03007890[0].unk_02) & ~gUnknown_03007890[0].unk_07;
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gUnknown_03004140.unk_0c = gUnknown_03007890[0].unk_02;
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flags = ((gUnknown_03007890->unk_02 ^ gUnknown_03004140.unk_0c) & gUnknown_03007890->unk_02) & ~gUnknown_03007890->unk_07;
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gUnknown_03004140.unk_0c = gUnknown_03007890->unk_02;
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if (flags)
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{
|
||||
gUnknown_03004140.unk_14 = flags;
|
||||
|
@ -1055,7 +1053,7 @@ void sub_800CF34(void)
|
|||
r5 = 0x02;
|
||||
for (ptr = gUnknown_03004140.unk_20; *ptr != 0xFFFF; ptr++)
|
||||
{
|
||||
if (*gUnknown_03007890[i].unk_18 == *ptr) // FIXME: Role of r0 and r1 is swapped
|
||||
if (gUnknown_03007890->unk_14[i].unk_04 == *ptr)
|
||||
{
|
||||
gUnknown_03004140.unk_00 |= r4;
|
||||
gUnknown_03004140.unk_01++;
|
||||
|
@ -1094,7 +1092,7 @@ void sub_800CF34(void)
|
|||
if (gUnknown_03004140.unk_0d)
|
||||
{
|
||||
r5 = 0x01;
|
||||
if (gUnknown_03007890[0].unk_06 && ((gUnknown_03004140.unk_03 & gUnknown_03004140.unk_00) != gUnknown_03004140.unk_00))
|
||||
if (gUnknown_03007890->unk_06 && ((gUnknown_03004140.unk_03 & gUnknown_03004140.unk_00) != gUnknown_03004140.unk_00))
|
||||
{
|
||||
r5 = 0x00;
|
||||
}
|
||||
|
@ -1135,281 +1133,6 @@ void sub_800CF34(void)
|
|||
}
|
||||
}
|
||||
}
|
||||
#else
|
||||
__attribute__((naked)) void sub_800CF34(void)
|
||||
{
|
||||
asm_unified("\tpush {r4-r7,lr}\n"
|
||||
"\tmov r7, r10\n"
|
||||
"\tmov r6, r9\n"
|
||||
"\tmov r5, r8\n"
|
||||
"\tpush {r5-r7}\n"
|
||||
"\tsub sp, 0x8\n"
|
||||
"\tldr r1, =gUnknown_03004140\n"
|
||||
"\tldrb r0, [r1, 0x4]\n"
|
||||
"\tsubs r0, 0x5\n"
|
||||
"\tlsls r0, 24\n"
|
||||
"\tlsrs r0, 24\n"
|
||||
"\tadds r3, r1, 0\n"
|
||||
"\tcmp r0, 0x3\n"
|
||||
"\tbls _0800CF52\n"
|
||||
"\tb _0800D146_break\n"
|
||||
"_0800CF52:\n"
|
||||
"\tldr r0, =gUnknown_03007890\n"
|
||||
"\tldr r2, [r0]\n"
|
||||
"\tldrb r1, [r2, 0x2]\n"
|
||||
"\tldrb r0, [r3, 0xC]\n"
|
||||
"\tadds r4, r1, 0\n"
|
||||
"\teors r4, r0\n"
|
||||
"\tands r4, r1\n"
|
||||
"\tldrb r0, [r2, 0x7]\n"
|
||||
"\tbics r4, r0\n"
|
||||
"\tmov r8, r4\n"
|
||||
"\tstrb r1, [r3, 0xC]\n"
|
||||
"\tcmp r4, 0\n"
|
||||
"\tbeq _0800CF7A\n"
|
||||
"\tstrh r4, [r3, 0x14]\n"
|
||||
"\tmovs r0, 0x10\n"
|
||||
"\tmovs r1, 0x1\n"
|
||||
"\tstr r3, [sp, 0x4]\n"
|
||||
"\tbl sub_800D30C\n"
|
||||
"\tldr r3, [sp, 0x4]\n"
|
||||
"_0800CF7A:\n"
|
||||
"\tmovs r0, 0\n"
|
||||
"\tstr r0, [sp]\n"
|
||||
"\tmovs r6, 0\n"
|
||||
"\tadds r7, r3, 0\n"
|
||||
"\tmovs r1, 0x24\n"
|
||||
"\tadds r1, r3\n"
|
||||
"\tmov r9, r1\n"
|
||||
"_0800CF88:\n"
|
||||
"\tmovs r0, 0x80\n"
|
||||
"\tlsls r0, 17\n"
|
||||
"\tlsls r0, r6\n"
|
||||
"\tlsrs r4, r0, 24\n"
|
||||
"\tmovs r5, 0\n"
|
||||
"\tmov r0, r8\n"
|
||||
"\tands r0, r4\n"
|
||||
"\tcmp r0, 0\n"
|
||||
"\tbeq _0800CFDA\n"
|
||||
"\tlsls r1, r6, 1\n"
|
||||
"\tadds r0, r7, 0\n"
|
||||
"\tadds r0, 0x28\n"
|
||||
"\tadds r1, r0\n"
|
||||
"\tldrh r0, [r7, 0x26]\n"
|
||||
"\tstrh r0, [r1]\n"
|
||||
"\tmov r2, r9\n"
|
||||
"\tldrb r1, [r2]\n"
|
||||
"\tadds r0, r4, 0\n"
|
||||
"\torrs r0, r1\n"
|
||||
"\tstrb r0, [r2]\n"
|
||||
"\tadds r6, 0x1\n"
|
||||
"\tmov r10, r6\n"
|
||||
"\tb _0800D090\n"
|
||||
"\t.pool\n"
|
||||
"_0800CFC0:\n"
|
||||
"\tldrb r1, [r7]\n"
|
||||
"\tadds r0, r4, 0\n"
|
||||
"\torrs r0, r1\n"
|
||||
"\tstrb r0, [r7]\n"
|
||||
"\tldrb r0, [r7, 0x1]\n"
|
||||
"\tadds r0, 0x1\n"
|
||||
"\tstrb r0, [r7, 0x1]\n"
|
||||
"\tldr r0, [sp]\n"
|
||||
"\torrs r0, r4\n"
|
||||
"\tstr r0, [sp]\n"
|
||||
"\tmovs r0, 0x1\n"
|
||||
"\torrs r5, r0\n"
|
||||
"\tb _0800D024\n"
|
||||
"_0800CFDA:\n"
|
||||
"\tmov r1, r9\n"
|
||||
"\tldrb r0, [r1]\n"
|
||||
"\tands r0, r4\n"
|
||||
"\tadds r2, r6, 0x1\n"
|
||||
"\tmov r10, r2\n"
|
||||
"\tcmp r0, 0\n"
|
||||
"\tbeq _0800D090\n"
|
||||
"\tldr r0, =gUnknown_03007880\n"
|
||||
"\tlsls r1, r6, 2\n"
|
||||
"\tadds r1, r0\n"
|
||||
"\tldr r1, [r1]\n"
|
||||
"\tldrh r0, [r1, 0x34]\n"
|
||||
"\tcmp r0, 0x46\n"
|
||||
"\tbne _0800D040\n"
|
||||
"\tadds r0, r1, 0\n"
|
||||
"\tadds r0, 0x61\n"
|
||||
"\tldrb r0, [r0]\n"
|
||||
"\tcmp r0, 0x1\n"
|
||||
"\tbne _0800D058\n"
|
||||
"\tmovs r5, 0x2\n"
|
||||
"\tldr r3, [r3, 0x20]\n"
|
||||
"\tldrh r2, [r3]\n"
|
||||
"\tldr r0, =0x0000ffff\n"
|
||||
"\tcmp r2, r0\n"
|
||||
"\tbeq _0800D024\n"
|
||||
"\tldr r0, =gUnknown_03007890\n"
|
||||
"\tldr r0, [r0]\n"
|
||||
"\tlsls r1, r6, 5\n"
|
||||
"\tadds r0, r1\n"
|
||||
"\tldrh r0, [r0, 0x18]\n"
|
||||
"\tldr r1, =0x0000ffff\n"
|
||||
"_0800D018:\n"
|
||||
"\tcmp r0, r2\n"
|
||||
"\tbeq _0800CFC0\n"
|
||||
"\tadds r3, 0x2\n"
|
||||
"\tldrh r2, [r3]\n"
|
||||
"\tcmp r2, r1\n"
|
||||
"\tbne _0800D018\n"
|
||||
"_0800D024:\n"
|
||||
"\tmovs r0, 0x1\n"
|
||||
"\tands r0, r5\n"
|
||||
"\tcmp r0, 0\n"
|
||||
"\tbne _0800D058\n"
|
||||
"\tmovs r0, 0x4\n"
|
||||
"\torrs r5, r0\n"
|
||||
"\tb _0800D058\n"
|
||||
"\t.pool\n"
|
||||
"_0800D040:\n"
|
||||
"\tlsls r1, r6, 1\n"
|
||||
"\tadds r0, r3, 0\n"
|
||||
"\tadds r0, 0x28\n"
|
||||
"\tadds r1, r0\n"
|
||||
"\tldrh r0, [r1]\n"
|
||||
"\tsubs r0, 0x1\n"
|
||||
"\tstrh r0, [r1]\n"
|
||||
"\tldr r1, =0x0000ffff\n"
|
||||
"\tands r0, r1\n"
|
||||
"\tcmp r0, 0\n"
|
||||
"\tbne _0800D058\n"
|
||||
"\tmovs r5, 0x6\n"
|
||||
"_0800D058:\n"
|
||||
"\tmovs r0, 0x2\n"
|
||||
"\tands r0, r5\n"
|
||||
"\tcmp r0, 0\n"
|
||||
"\tbeq _0800D07E\n"
|
||||
"\tmov r2, r9\n"
|
||||
"\tldrb r0, [r2]\n"
|
||||
"\tbics r0, r4\n"
|
||||
"\tmovs r2, 0\n"
|
||||
"\tmov r1, r9\n"
|
||||
"\tstrb r0, [r1]\n"
|
||||
"\tlsls r0, r6, 1\n"
|
||||
"\tadds r1, r7, 0\n"
|
||||
"\tadds r1, 0x28\n"
|
||||
"\tadds r0, r1\n"
|
||||
"\tstrh r2, [r0]\n"
|
||||
"\tmovs r0, 0x8\n"
|
||||
"\tadds r1, r6, 0\n"
|
||||
"\tbl rfu_clearSlot\n"
|
||||
"_0800D07E:\n"
|
||||
"\tmovs r0, 0x4\n"
|
||||
"\tands r5, r0\n"
|
||||
"\tldr r3, =gUnknown_03004140\n"
|
||||
"\tcmp r5, 0\n"
|
||||
"\tbeq _0800D090\n"
|
||||
"\tldrb r1, [r7, 0xD]\n"
|
||||
"\tadds r0, r4, 0\n"
|
||||
"\torrs r0, r1\n"
|
||||
"\tstrb r0, [r7, 0xD]\n"
|
||||
"_0800D090:\n"
|
||||
"\tmov r2, r10\n"
|
||||
"\tlsls r0, r2, 24\n"
|
||||
"\tlsrs r6, r0, 24\n"
|
||||
"\tcmp r6, 0x3\n"
|
||||
"\tbhi _0800D09C\n"
|
||||
"\tb _0800CF88\n"
|
||||
"_0800D09C:\n"
|
||||
"\tldr r4, [sp]\n"
|
||||
"\tcmp r4, 0\n"
|
||||
"\tbeq _0800D0AE\n"
|
||||
"\tldr r0, =gUnknown_03004140\n"
|
||||
"\tstrh r4, [r0, 0x14]\n"
|
||||
"\tmovs r0, 0x11\n"
|
||||
"\tmovs r1, 0x1\n"
|
||||
"\tbl sub_800D30C\n"
|
||||
"_0800D0AE:\n"
|
||||
"\tldr r1, =gUnknown_03004140\n"
|
||||
"\tldrb r0, [r1, 0xD]\n"
|
||||
"\tcmp r0, 0\n"
|
||||
"\tbeq _0800D0EA\n"
|
||||
"\tmovs r5, 0x1\n"
|
||||
"\tldr r0, =gUnknown_03007890\n"
|
||||
"\tldr r0, [r0]\n"
|
||||
"\tldrb r0, [r0, 0x6]\n"
|
||||
"\tcmp r0, 0\n"
|
||||
"\tbeq _0800D0CE\n"
|
||||
"\tldrb r0, [r1, 0x3]\n"
|
||||
"\tldrb r1, [r1]\n"
|
||||
"\tands r0, r1\n"
|
||||
"\tcmp r0, r1\n"
|
||||
"\tbeq _0800D0CE\n"
|
||||
"\tmovs r5, 0\n"
|
||||
"_0800D0CE:\n"
|
||||
"\tcmp r5, 0\n"
|
||||
"\tbeq _0800D0EA\n"
|
||||
"\tldr r4, =gUnknown_03004140\n"
|
||||
"\tldrb r0, [r4, 0xD]\n"
|
||||
"\tbl sub_800D334\n"
|
||||
"\tldrb r0, [r4, 0xD]\n"
|
||||
"\tmovs r1, 0\n"
|
||||
"\tstrh r0, [r4, 0x14]\n"
|
||||
"\tstrb r1, [r4, 0xD]\n"
|
||||
"\tmovs r0, 0x12\n"
|
||||
"\tmovs r1, 0x1\n"
|
||||
"\tbl sub_800D30C\n"
|
||||
"_0800D0EA:\n"
|
||||
"\tldr r0, =gUnknown_03004140\n"
|
||||
"\tadds r1, r0, 0\n"
|
||||
"\tadds r1, 0x24\n"
|
||||
"\tldrb r1, [r1]\n"
|
||||
"\tadds r3, r0, 0\n"
|
||||
"\tcmp r1, 0\n"
|
||||
"\tbne _0800D146_break\n"
|
||||
"\tldrb r0, [r3, 0x4]\n"
|
||||
"\tcmp r0, 0x8\n"
|
||||
"\tbne _0800D146_break\n"
|
||||
"\tldrb r0, [r3, 0x7]\n"
|
||||
"\tcmp r0, 0\n"
|
||||
"\tbne _0800D120\n"
|
||||
"\tstrb r0, [r3, 0x5]\n"
|
||||
"\tstrb r0, [r3, 0x4]\n"
|
||||
"\tmovs r0, 0x14\n"
|
||||
"\tmovs r1, 0\n"
|
||||
"\tbl sub_800D30C\n"
|
||||
"\tb _0800D146_break\n"
|
||||
"\t.pool\n"
|
||||
"_0800D120:\n"
|
||||
"\tcmp r0, 0x2\n"
|
||||
"\tbne _0800D12C\n"
|
||||
"\tmovs r0, 0x3\n"
|
||||
"\tstrb r0, [r3, 0x7]\n"
|
||||
"\tmovs r0, 0x9\n"
|
||||
"\tb _0800D132\n"
|
||||
"_0800D12C:\n"
|
||||
"\tmovs r0, 0x1\n"
|
||||
"\tstrb r0, [r3, 0x7]\n"
|
||||
"\tmovs r0, 0x5\n"
|
||||
"_0800D132:\n"
|
||||
"\tstrb r0, [r3, 0x4]\n"
|
||||
"\tldrb r0, [r3]\n"
|
||||
"\tcmp r0, 0\n"
|
||||
"\tbeq _0800D146_break\n"
|
||||
"\tmovs r0, 0\n"
|
||||
"\tstrh r0, [r3, 0x1A]\n"
|
||||
"\tmovs r0, 0x8\n"
|
||||
"\tstrb r0, [r3, 0x7]\n"
|
||||
"\tmovs r0, 0x5\n"
|
||||
"\tstrb r0, [r3, 0x4]\n"
|
||||
"_0800D146_break:\n"
|
||||
"\tadd sp, 0x8\n"
|
||||
"\tpop {r3-r5}\n"
|
||||
"\tmov r8, r3\n"
|
||||
"\tmov r9, r4\n"
|
||||
"\tmov r10, r5\n"
|
||||
"\tpop {r4-r7}\n"
|
||||
"\tpop {r0}\n"
|
||||
"\tbx r0");
|
||||
}
|
||||
#endif
|
||||
|
||||
static void sub_800D158(void)
|
||||
{
|
||||
|
@ -1436,9 +1159,52 @@ static void sub_800D158(void)
|
|||
if (gUnknown_03004140.unk_02 == 0)
|
||||
{
|
||||
gUnknown_03004140.unk_04 = gUnknown_03004140.unk_05 = 0;
|
||||
sub_800D334(gUnknown_03007890[0].unk_02 | gUnknown_03007890[0].unk_03);
|
||||
sub_800D334(gUnknown_03007890->unk_02 | gUnknown_03007890->unk_03);
|
||||
gUnknown_03004140.unk_14 = 0;
|
||||
sub_800D30C(0x25, 0x01);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static void sub_800D20C(void)
|
||||
{
|
||||
if (gUnknown_03004140.unk_04 == 15 && gUnknown_03007880[gUnknown_03004140.unk_10]->unk_0 == 0x26)
|
||||
{
|
||||
gUnknown_03004140.unk_04 = gUnknown_03004140.unk_05 = 0;
|
||||
rfu_clearSlot(4, gUnknown_03004140.unk_10);
|
||||
gUnknown_03004140.unk_24 &= ~(1 << gUnknown_03004140.unk_10);
|
||||
gUnknown_03004140.unk_28[gUnknown_03004140.unk_10] = 0;
|
||||
sub_800D30C(0x24, 0x00);
|
||||
}
|
||||
}
|
||||
|
||||
static void sub_800D268(void)
|
||||
{
|
||||
if (gUnknown_03004140.unk_06 == 0 && gUnknown_03004140.unk_0a == 1)
|
||||
{
|
||||
gUnknown_03004140.unk_11 = gUnknown_03004140.unk_04;
|
||||
gUnknown_03004140.unk_12 = gUnknown_03004140.unk_05;
|
||||
gUnknown_03004140.unk_04 = 16;
|
||||
gUnknown_03004140.unk_05 = 17;
|
||||
gUnknown_03004140.unk_0a = 2;
|
||||
}
|
||||
}
|
||||
|
||||
static u8 sub_800D294(void)
|
||||
{
|
||||
u8 i;
|
||||
u16 *ptr;
|
||||
u8 flags = 0x00;
|
||||
|
||||
for (i = 0; i < gUnknown_03007890->unk_08; i++)
|
||||
{
|
||||
for (ptr = gUnknown_03004140.unk_20; *ptr != 0xffff; ptr++)
|
||||
{
|
||||
if (gUnknown_03007890->unk_14[i].unk_04 == *ptr)
|
||||
{
|
||||
flags |= (1 << i);
|
||||
}
|
||||
}
|
||||
}
|
||||
return flags;
|
||||
}
|
||||
|
|
Loading…
Reference in a new issue