From 051d5e123575034400234af653b832802c3d79d3 Mon Sep 17 00:00:00 2001
From: Michel Heily <michelheily@gmail.com>
Date: Fri, 1 May 2020 18:28:49 +0300
Subject: [PATCH] Fix build error and warnings

Former-commit-id: 122b21bd486ca25681b4462a44edb18f778bf8d6
Former-commit-id: 3dc7ff4285e781654526f15e8f5ee3745e197b03
---
 rustboyadvance-core/src/arm7tdmi/arm/exec.rs | 18 ------------------
 rustboyadvance-core/src/debugger/command.rs  |  1 -
 rustboyadvance-core/src/lib.rs               |  1 -
 rustboyadvance-core/src/util.rs              |  4 ++--
 4 files changed, 2 insertions(+), 22 deletions(-)

diff --git a/rustboyadvance-core/src/arm7tdmi/arm/exec.rs b/rustboyadvance-core/src/arm7tdmi/arm/exec.rs
index 92fe2ee..cff3beb 100644
--- a/rustboyadvance-core/src/arm7tdmi/arm/exec.rs
+++ b/rustboyadvance-core/src/arm7tdmi/arm/exec.rs
@@ -14,17 +14,6 @@ fn get_bs_op(shift_field: u32) -> BarrelShiftOpCode {
     BarrelShiftOpCode::from_u8(shift_field.bit_range(5..7) as u8).unwrap()
 }
 
-#[inline(always)]
-fn get_shift_reg_by(shift_field: u32) -> ShiftRegisterBy {
-    if shift_field.bit(4) {
-        let rs = shift_field.bit_range(8..12) as usize;
-        ShiftRegisterBy::ByRegister(rs)
-    } else {
-        let amount = shift_field.bit_range(7..12) as u32;
-        ShiftRegisterBy::ByAmount(amount)
-    }
-}
-
 impl Core {
     pub fn exec_arm(&mut self, bus: &mut SysBus, insn: &ArmInstruction) -> CpuAction {
         match insn.fmt {
@@ -693,16 +682,9 @@ impl Core {
     pub fn exec_arm_mull_mlal(&mut self, sb: &mut SysBus, insn: &ArmInstruction) -> CpuAction {
         let rd_hi = insn.rd_hi();
         let rd_lo = insn.rd_lo();
-        let rn = insn.raw.bit_range(8..12) as usize;
         let rs = insn.rs();
         let rm = insn.rm();
 
-        // // check validity
-        // assert!(
-        //     !(REG_PC == rd_hi || REG_PC == rd_lo || REG_PC == rn || REG_PC == rs || REG_PC == rm)
-        // );
-        // assert!(!(rd_hi != rd_hi && rd_hi != rm && rd_lo != rm));
-
         let op1 = self.get_reg(rm);
         let op2 = self.get_reg(rs);
         let mut result: u64 = if insn.u_flag() {
diff --git a/rustboyadvance-core/src/debugger/command.rs b/rustboyadvance-core/src/debugger/command.rs
index c99570e..15a904a 100644
--- a/rustboyadvance-core/src/debugger/command.rs
+++ b/rustboyadvance-core/src/debugger/command.rs
@@ -1,5 +1,4 @@
 use std::path::Path;
-use std::sync::atomic::Ordering;
 use std::time;
 
 use crate::arm7tdmi::arm::ArmInstruction;
diff --git a/rustboyadvance-core/src/lib.rs b/rustboyadvance-core/src/lib.rs
index 74a137b..0012a04 100644
--- a/rustboyadvance-core/src/lib.rs
+++ b/rustboyadvance-core/src/lib.rs
@@ -80,7 +80,6 @@ pub trait InputInterface {
     }
 }
 
-#[cfg(feature = "debugger")]
 #[derive(Debug)]
 pub enum GBAError {
     IO(::std::io::Error),
diff --git a/rustboyadvance-core/src/util.rs b/rustboyadvance-core/src/util.rs
index b48521d..99d14c4 100644
--- a/rustboyadvance-core/src/util.rs
+++ b/rustboyadvance-core/src/util.rs
@@ -32,8 +32,8 @@ use std::net::TcpListener;
 use std::net::ToSocketAddrs;
 
 pub fn spawn_and_run_gdb_server<A: ToSocketAddrs + fmt::Display>(
-    target: &mut GameBoyAdvance,
-    addr: A,
+    #[allow(unused)] target: &mut GameBoyAdvance,
+    #[allow(unused)] addr: A,
 ) -> Result<(), Box<dyn std::error::Error>> {
     #[cfg(feature = "gdb")]
     {