core: Get rid of that BoxedMemory nonsense
Just directly impl Bus trait for Box<[u8]> Former-commit-id: 7b8a29972520afb7ff197708b9c2146b293a5f29 Former-commit-id: 0c528165ed899fad14b1e25995fdfe8ae004da2a
This commit is contained in:
parent
130a7608e7
commit
1ca261e5c7
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@ -62,3 +62,26 @@ pub trait DebugRead: Bus {
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bytes
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bytes
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}
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}
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}
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}
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/// The caller is assumed to handle out of bound accesses,
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/// For performance reasons, this impl trusts that 'addr' is within the array range.
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impl Bus for Box<[u8]> {
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#[inline]
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fn read_8(&mut self, addr: Addr) -> u8 {
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unsafe { *self.get_unchecked(addr as usize) }
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}
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#[inline]
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fn write_8(&mut self, addr: Addr, value: u8) {
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unsafe {
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*self.get_unchecked_mut(addr as usize) = value;
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}
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}
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}
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impl DebugRead for Box<[u8]> {
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#[inline]
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fn debug_read_8(&mut self, addr: Addr) -> u8 {
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self[addr as usize]
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}
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}
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@ -261,7 +261,7 @@ impl Debugger {
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let save = read_bin_file(&Path::new(&load_path))
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let save = read_bin_file(&Path::new(&load_path))
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.expect("failed to read save state from file");
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.expect("failed to read save state from file");
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self.gba
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self.gba
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.restore_state(&save, Box::from(self.gba.sysbus.get_bios()))
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.restore_state(&save)
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.expect("failed to deserialize");
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.expect("failed to deserialize");
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}
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}
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ListSymbols(Some(pattern)) => {
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ListSymbols(Some(pattern)) => {
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@ -179,7 +179,7 @@ impl GameBoyAdvance {
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bincode::serialize(&s)
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bincode::serialize(&s)
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}
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}
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pub fn restore_state(&mut self, bytes: &[u8], bios: Box<[u8]>) -> bincode::Result<()> {
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pub fn restore_state(&mut self, bytes: &[u8]) -> bincode::Result<()> {
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let decoded: Box<SaveState> = bincode::deserialize_from(bytes)?;
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let decoded: Box<SaveState> = bincode::deserialize_from(bytes)?;
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self.cpu.restore_state(decoded.cpu_state);
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self.cpu.restore_state(decoded.cpu_state);
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@ -188,7 +188,6 @@ impl GameBoyAdvance {
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self.io_devs = Shared::new(decoded.io_devs);
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self.io_devs = Shared::new(decoded.io_devs);
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// Restore memory state
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// Restore memory state
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self.cpu.set_memory_interface(self.sysbus.clone());
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self.cpu.set_memory_interface(self.sysbus.clone());
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self.sysbus.set_bios(bios);
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self.sysbus.set_iwram(decoded.iwram);
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self.sysbus.set_iwram(decoded.iwram);
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self.sysbus.set_ewram(decoded.ewram);
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self.sysbus.set_ewram(decoded.ewram);
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// Redistribute shared pointers
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// Redistribute shared pointers
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@ -11,7 +11,6 @@ use super::dma::{DmaNotifer, TIMING_HBLANK, TIMING_VBLANK};
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use super::interrupt::{self, Interrupt, InterruptConnect, SharedInterruptFlags};
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use super::interrupt::{self, Interrupt, InterruptConnect, SharedInterruptFlags};
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use super::sched::*;
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use super::sched::*;
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pub use super::sysbus::consts::*;
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pub use super::sysbus::consts::*;
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use super::util::BoxedMemory;
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#[cfg(not(feature = "no_video_interface"))]
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#[cfg(not(feature = "no_video_interface"))]
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use super::VideoInterface;
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use super::VideoInterface;
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@ -210,9 +209,9 @@ pub struct Gpu {
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pub bldalpha: BlendAlpha,
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pub bldalpha: BlendAlpha,
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pub bldy: u16,
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pub bldy: u16,
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pub palette_ram: BoxedMemory,
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pub palette_ram: Box<[u8]>,
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pub vram: BoxedMemory,
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pub vram: Box<[u8]>,
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pub oam: BoxedMemory,
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pub oam: Box<[u8]>,
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pub(super) vram_obj_tiles_start: u32,
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pub(super) vram_obj_tiles_start: u32,
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@ -259,9 +258,9 @@ impl Gpu {
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vcount: 0,
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vcount: 0,
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cycles_left_for_current_state: CYCLES_HDRAW,
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cycles_left_for_current_state: CYCLES_HDRAW,
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palette_ram: BoxedMemory::new(vec![0; PALETTE_RAM_SIZE].into_boxed_slice()),
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palette_ram: vec![0; PALETTE_RAM_SIZE].into_boxed_slice(),
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vram: BoxedMemory::new(vec![0; VIDEO_RAM_SIZE].into_boxed_slice()),
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vram: vec![0; VIDEO_RAM_SIZE].into_boxed_slice(),
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oam: BoxedMemory::new(vec![0; OAM_SIZE].into_boxed_slice()),
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oam: vec![0; OAM_SIZE].into_boxed_slice(),
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obj_buffer: vec![Default::default(); DISPLAY_WIDTH * DISPLAY_HEIGHT],
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obj_buffer: vec![Default::default(); DISPLAY_WIDTH * DISPLAY_HEIGHT],
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@ -6,7 +6,7 @@ use super::cartridge::Cartridge;
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use super::dma::DmaNotifer;
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use super::dma::DmaNotifer;
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use super::iodev::{IoDevices, WaitControl};
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use super::iodev::{IoDevices, WaitControl};
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use super::sched::Scheduler;
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use super::sched::Scheduler;
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use super::util::{BoxedMemory, Shared, WeakPointer};
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use super::util::{Shared, WeakPointer};
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pub mod consts {
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pub mod consts {
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pub const WORK_RAM_SIZE: usize = 256 * 1024;
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pub const WORK_RAM_SIZE: usize = 256 * 1024;
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@ -144,8 +144,8 @@ pub struct SysBus {
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scheduler: Shared<Scheduler>,
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scheduler: Shared<Scheduler>,
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bios: BoxedMemory,
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bios: BoxedMemory,
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onboard_work_ram: BoxedMemory,
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ewram: Box<[u8]>,
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internal_work_ram: BoxedMemory,
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iwram: Box<[u8]>,
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pub cartridge: Cartridge,
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pub cartridge: Cartridge,
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cycle_luts: CycleLookupTables,
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cycle_luts: CycleLookupTables,
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@ -173,9 +173,9 @@ impl SysBus {
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scheduler,
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scheduler,
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cartridge,
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cartridge,
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bios: BoxedMemory::new(bios_rom),
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bios: bios_rom,
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onboard_work_ram: BoxedMemory::new(ewram),
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ewram,
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internal_work_ram: BoxedMemory::new(iwram),
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iwram,
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cycle_luts: luts,
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cycle_luts: luts,
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trace_access: false,
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trace_access: false,
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}
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}
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@ -192,28 +192,20 @@ impl SysBus {
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SysBus::new_with_memories(scheduler, io, cartridge, bios_rom, ewram, iwram)
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SysBus::new_with_memories(scheduler, io, cartridge, bios_rom, ewram, iwram)
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}
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}
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pub fn set_bios(&mut self, buffer: Box<[u8]>) {
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self.bios.mem = buffer;
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}
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pub fn set_ewram(&mut self, buffer: Box<[u8]>) {
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pub fn set_ewram(&mut self, buffer: Box<[u8]>) {
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self.onboard_work_ram.mem = buffer;
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self.ewram = buffer;
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}
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}
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pub fn set_iwram(&mut self, buffer: Box<[u8]>) {
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pub fn set_iwram(&mut self, buffer: Box<[u8]>) {
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self.internal_work_ram.mem = buffer;
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self.iwram = buffer;
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}
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pub fn get_bios(&self) -> &[u8] {
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&self.bios.mem
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}
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}
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pub fn get_ewram(&self) -> &[u8] {
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pub fn get_ewram(&self) -> &[u8] {
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&self.onboard_work_ram.mem
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&self.ewram
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}
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}
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pub fn get_iwram(&self) -> &[u8] {
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pub fn get_iwram(&self) -> &[u8] {
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&self.internal_work_ram.mem
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&self.iwram
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}
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}
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pub fn set_scheduler(&mut self, s: Shared<Scheduler>) {
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pub fn set_scheduler(&mut self, s: Shared<Scheduler>) {
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@ -270,8 +262,8 @@ impl Bus for SysBus {
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fn read_32(&mut self, addr: Addr) -> u32 {
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fn read_32(&mut self, addr: Addr) -> u32 {
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match addr & 0xff000000 {
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match addr & 0xff000000 {
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BIOS_ADDR => self.bios.read_32(addr),
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BIOS_ADDR => self.bios.read_32(addr),
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EWRAM_ADDR => self.onboard_work_ram.read_32(addr & 0x3_fffc),
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EWRAM_ADDR => self.ewram.read_32(addr & 0x3_fffc),
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IWRAM_ADDR => self.internal_work_ram.read_32(addr & 0x7ffc),
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IWRAM_ADDR => self.iwram.read_32(addr & 0x7ffc),
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IOMEM_ADDR => {
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IOMEM_ADDR => {
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let addr = if addr & 0xfffc == 0x8000 {
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let addr = if addr & 0xfffc == 0x8000 {
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0x800
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0x800
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@ -297,8 +289,8 @@ impl Bus for SysBus {
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fn read_16(&mut self, addr: Addr) -> u16 {
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fn read_16(&mut self, addr: Addr) -> u16 {
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match addr & 0xff000000 {
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match addr & 0xff000000 {
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BIOS_ADDR => self.bios.read_16(addr),
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BIOS_ADDR => self.bios.read_16(addr),
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EWRAM_ADDR => self.onboard_work_ram.read_16(addr & 0x3_fffe),
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EWRAM_ADDR => self.ewram.read_16(addr & 0x3_fffe),
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IWRAM_ADDR => self.internal_work_ram.read_16(addr & 0x7ffe),
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IWRAM_ADDR => self.iwram.read_16(addr & 0x7ffe),
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IOMEM_ADDR => {
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IOMEM_ADDR => {
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let addr = if addr & 0xfffe == 0x8000 {
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let addr = if addr & 0xfffe == 0x8000 {
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0x800
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0x800
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@ -324,8 +316,8 @@ impl Bus for SysBus {
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fn read_8(&mut self, addr: Addr) -> u8 {
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fn read_8(&mut self, addr: Addr) -> u8 {
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match addr & 0xff000000 {
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match addr & 0xff000000 {
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BIOS_ADDR => self.bios.read_8(addr),
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BIOS_ADDR => self.bios.read_8(addr),
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EWRAM_ADDR => self.onboard_work_ram.read_8(addr & 0x3_ffff),
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EWRAM_ADDR => self.ewram.read_8(addr & 0x3_ffff),
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IWRAM_ADDR => self.internal_work_ram.read_8(addr & 0x7fff),
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IWRAM_ADDR => self.iwram.read_8(addr & 0x7fff),
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IOMEM_ADDR => {
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IOMEM_ADDR => {
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let addr = if addr & 0xffff == 0x8000 {
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let addr = if addr & 0xffff == 0x8000 {
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0x800
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0x800
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@ -351,8 +343,8 @@ impl Bus for SysBus {
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fn write_32(&mut self, addr: Addr, value: u32) {
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fn write_32(&mut self, addr: Addr, value: u32) {
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match addr & 0xff000000 {
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match addr & 0xff000000 {
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BIOS_ADDR => {}
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BIOS_ADDR => {}
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EWRAM_ADDR => self.onboard_work_ram.write_32(addr & 0x3_fffc, value),
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EWRAM_ADDR => self.ewram.write_32(addr & 0x3_fffc, value),
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IWRAM_ADDR => self.internal_work_ram.write_32(addr & 0x7ffc, value),
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IWRAM_ADDR => self.iwram.write_32(addr & 0x7ffc, value),
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IOMEM_ADDR => {
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IOMEM_ADDR => {
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let addr = if addr & 0xfffc == 0x8000 {
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let addr = if addr & 0xfffc == 0x8000 {
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0x800
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0x800
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@ -376,8 +368,8 @@ impl Bus for SysBus {
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fn write_16(&mut self, addr: Addr, value: u16) {
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fn write_16(&mut self, addr: Addr, value: u16) {
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match addr & 0xff000000 {
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match addr & 0xff000000 {
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BIOS_ADDR => {}
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BIOS_ADDR => {}
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EWRAM_ADDR => self.onboard_work_ram.write_16(addr & 0x3_fffe, value),
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EWRAM_ADDR => self.ewram.write_16(addr & 0x3_fffe, value),
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IWRAM_ADDR => self.internal_work_ram.write_16(addr & 0x7ffe, value),
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IWRAM_ADDR => self.iwram.write_16(addr & 0x7ffe, value),
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IOMEM_ADDR => {
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IOMEM_ADDR => {
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let addr = if addr & 0xfffe == 0x8000 {
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let addr = if addr & 0xfffe == 0x8000 {
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0x800
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0x800
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@ -401,8 +393,8 @@ impl Bus for SysBus {
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fn write_8(&mut self, addr: Addr, value: u8) {
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fn write_8(&mut self, addr: Addr, value: u8) {
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match addr & 0xff000000 {
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match addr & 0xff000000 {
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BIOS_ADDR => {}
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BIOS_ADDR => {}
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EWRAM_ADDR => self.onboard_work_ram.write_8(addr & 0x3_ffff, value),
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EWRAM_ADDR => self.ewram.write_8(addr & 0x3_ffff, value),
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IWRAM_ADDR => self.internal_work_ram.write_8(addr & 0x7fff, value),
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IWRAM_ADDR => self.iwram.write_8(addr & 0x7fff, value),
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IOMEM_ADDR => {
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IOMEM_ADDR => {
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let addr = if addr & 0xffff == 0x8000 {
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let addr = if addr & 0xffff == 0x8000 {
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0x800
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0x800
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@ -427,8 +419,8 @@ impl DebugRead for SysBus {
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fn debug_read_8(&mut self, addr: Addr) -> u8 {
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fn debug_read_8(&mut self, addr: Addr) -> u8 {
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match addr & 0xff000000 {
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match addr & 0xff000000 {
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BIOS_ADDR => self.bios.debug_read_8(addr),
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BIOS_ADDR => self.bios.debug_read_8(addr),
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EWRAM_ADDR => self.onboard_work_ram.debug_read_8(addr & 0x3_ffff),
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EWRAM_ADDR => self.ewram.debug_read_8(addr & 0x3_ffff),
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IWRAM_ADDR => self.internal_work_ram.debug_read_8(addr & 0x7fff),
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IWRAM_ADDR => self.iwram.debug_read_8(addr & 0x7fff),
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IOMEM_ADDR => {
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IOMEM_ADDR => {
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let addr = if addr & 0xffff == 0x8000 {
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let addr = if addr & 0xffff == 0x8000 {
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0x800
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0x800
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@ -6,8 +6,6 @@ use std::path::Path;
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use std::ptr;
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use std::ptr;
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use std::time;
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use std::time;
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use super::bus::{Addr, Bus, DebugRead};
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#[cfg(not(target_arch = "wasm32"))]
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#[cfg(not(target_arch = "wasm32"))]
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type Instant = time::Instant;
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type Instant = time::Instant;
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#[cfg(not(target_arch = "wasm32"))]
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#[cfg(not(target_arch = "wasm32"))]
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@ -260,33 +258,3 @@ where
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Shared::new(Default::default())
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Shared::new(Default::default())
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}
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}
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}
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}
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#[derive(Serialize, Deserialize, Clone, Debug)]
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#[repr(transparent)]
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pub struct BoxedMemory {
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pub mem: Box<[u8]>,
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}
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impl BoxedMemory {
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pub fn new(boxed_slice: Box<[u8]>) -> BoxedMemory {
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BoxedMemory { mem: boxed_slice }
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}
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}
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impl Bus for BoxedMemory {
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fn read_8(&mut self, addr: Addr) -> u8 {
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unsafe { *self.mem.get_unchecked(addr as usize) }
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}
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fn write_8(&mut self, addr: Addr, value: u8) {
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unsafe {
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*self.mem.get_unchecked_mut(addr as usize) = value;
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}
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}
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}
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impl DebugRead for BoxedMemory {
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fn debug_read_8(&mut self, addr: Addr) -> u8 {
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self.mem[addr as usize]
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}
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}
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@ -276,7 +276,7 @@ fn main() -> Result<(), Box<dyn std::error::Error>> {
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if savestate_path.is_file() {
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if savestate_path.is_file() {
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let save = read_bin_file(&savestate_path)?;
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let save = read_bin_file(&savestate_path)?;
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info!("Restoring state from {:?}...", savestate_path);
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info!("Restoring state from {:?}...", savestate_path);
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gba.restore_state(&save, bios_bin.clone())?;
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gba.restore_state(&save)?;
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info!("Restored!");
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info!("Restored!");
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} else {
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} else {
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info!("Savestate not created, please create one by pressing F5");
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info!("Savestate not created, please create one by pressing F5");
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Reference in a new issue