core: arm7tdmi: Comment out old tests for now
Former-commit-id: 01bfe52e513de9decb1a20e2e1d501b564f981b5
This commit is contained in:
Michel Heily
parent
dc1cd84225
commit
1d7035b600
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@ -365,185 +365,185 @@ impl ArmInstruction {
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}
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}
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#[cfg(test)]
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/// All instructions constants were generated using an ARM assembler.
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mod tests {
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use super::*;
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use crate::core::arm7tdmi::*;
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use crate::core::sysbus::BoxedMemory;
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// #[cfg(test)]
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// /// All instructions constants were generated using an ARM assembler.
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// mod tests {
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// use super::*;
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// use crate::core::arm7tdmi::*;
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// use crate::core::sysbus::BoxedMemory;
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#[test]
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fn swi() {
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let mut core = Core::new();
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// #[test]
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// fn swi() {
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// let mut core = Core::new();
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let bytes = vec![];
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let mut mem = BoxedMemory::new(bytes.into_boxed_slice(), 0xffff_ffff);
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// let bytes = vec![];
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// let mut mem = BoxedMemory::new(bytes.into_boxed_slice(), 0xffff_ffff);
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// swi #0x1337
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let decoded = ArmInstruction::decode(0xef001337, 0).unwrap();
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assert_eq!(decoded.fmt, ArmFormat::SWI);
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assert_eq!(decoded.swi_comment(), 0x1337);
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assert_eq!(format!("{}", decoded), "swi\t#0x1337");
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// // swi #0x1337
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// let decoded = ArmInstruction::decode(0xef001337, 0).unwrap();
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// assert_eq!(decoded.fmt, ArmFormat::SWI);
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// assert_eq!(decoded.swi_comment(), 0x1337);
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// assert_eq!(format!("{}", decoded), "swi\t#0x1337");
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core.exec_arm(&mut mem, decoded).unwrap();
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assert_eq!(core.did_pipeline_flush(), true);
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// core.exec_arm(&mut mem, decoded).unwrap();
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// assert_eq!(core.did_pipeline_flush(), true);
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assert_eq!(core.cpsr.mode(), CpuMode::Supervisor);
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assert_eq!(core.pc, Exception::SoftwareInterrupt as u32);
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}
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// assert_eq!(core.cpsr.mode(), CpuMode::Supervisor);
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// assert_eq!(core.pc, Exception::SoftwareInterrupt as u32);
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// }
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#[test]
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fn branch_forwards() {
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// 0x20: b 0x30
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let decoded = ArmInstruction::decode(0xea_00_00_02, 0x20).unwrap();
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assert_eq!(decoded.fmt, ArmFormat::B_BL);
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assert_eq!(decoded.link_flag(), false);
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assert_eq!(
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(decoded.pc as i32).wrapping_add(decoded.branch_offset()) + 8,
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0x30
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);
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assert_eq!(format!("{}", decoded), "b\t0x30");
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// #[test]
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// fn branch_forwards() {
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// // 0x20: b 0x30
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// let decoded = ArmInstruction::decode(0xea_00_00_02, 0x20).unwrap();
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// assert_eq!(decoded.fmt, ArmFormat::B_BL);
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// assert_eq!(decoded.link_flag(), false);
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// assert_eq!(
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// (decoded.pc as i32).wrapping_add(decoded.branch_offset()) + 8,
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// 0x30
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// );
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// assert_eq!(format!("{}", decoded), "b\t0x30");
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let mut core = Core::new();
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core.pc = 0x20 + 8;
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// let mut core = Core::new();
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// core.pc = 0x20 + 8;
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let bytes = vec![];
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let mut mem = BoxedMemory::new(bytes.into_boxed_slice(), 0xffff_ffff);
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// let bytes = vec![];
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// let mut mem = BoxedMemory::new(bytes.into_boxed_slice(), 0xffff_ffff);
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core.exec_arm(&mut mem, decoded).unwrap();
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assert_eq!(core.did_pipeline_flush(), true);
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assert_eq!(core.pc, 0x30);
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}
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// core.exec_arm(&mut mem, decoded).unwrap();
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// assert_eq!(core.did_pipeline_flush(), true);
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// assert_eq!(core.pc, 0x30);
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// }
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#[test]
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fn branch_link_backwards() {
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// 0x20: bl 0x10
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let decoded = ArmInstruction::decode(0xeb_ff_ff_fa, 0x20).unwrap();
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assert_eq!(decoded.fmt, ArmFormat::B_BL);
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assert_eq!(decoded.link_flag(), true);
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assert_eq!(
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(decoded.pc as i32).wrapping_add(decoded.branch_offset()) + 8,
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0x10
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);
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assert_eq!(format!("{}", decoded), "bl\t0x10");
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// #[test]
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// fn branch_link_backwards() {
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// // 0x20: bl 0x10
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// let decoded = ArmInstruction::decode(0xeb_ff_ff_fa, 0x20).unwrap();
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// assert_eq!(decoded.fmt, ArmFormat::B_BL);
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// assert_eq!(decoded.link_flag(), true);
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// assert_eq!(
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// (decoded.pc as i32).wrapping_add(decoded.branch_offset()) + 8,
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// 0x10
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// );
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// assert_eq!(format!("{}", decoded), "bl\t0x10");
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let mut core = Core::new();
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core.pc = 0x20 + 8;
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// let mut core = Core::new();
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// core.pc = 0x20 + 8;
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let bytes = vec![];
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let mut mem = BoxedMemory::new(bytes.into_boxed_slice(), 0xffff_ffff);
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// let bytes = vec![];
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// let mut mem = BoxedMemory::new(bytes.into_boxed_slice(), 0xffff_ffff);
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core.exec_arm(&mut mem, decoded).unwrap();
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assert_eq!(core.did_pipeline_flush(), true);
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assert_eq!(core.pc, 0x10);
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}
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// core.exec_arm(&mut mem, decoded).unwrap();
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// assert_eq!(core.did_pipeline_flush(), true);
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// assert_eq!(core.pc, 0x10);
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// }
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#[test]
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fn ldr_pre_index() {
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// ldreq r2, [r5, -r6, lsl #5]
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let decoded = ArmInstruction::decode(0x07_15_22_86, 0).unwrap();
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assert_eq!(decoded.fmt, ArmFormat::LDR_STR);
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assert_eq!(decoded.cond, ArmCond::EQ);
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assert_eq!(decoded.load_flag(), true);
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assert_eq!(decoded.pre_index_flag(), true);
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assert_eq!(decoded.write_back_flag(), false);
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assert_eq!(decoded.rd(), 2);
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assert_eq!(decoded.rn(), 5);
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assert_eq!(
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decoded.ldr_str_offset(),
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BarrelShifterValue::ShiftedRegister(ShiftedRegister {
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reg: 6,
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shift_by: ShiftRegisterBy::ByAmount(5),
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bs_op: BarrelShiftOpCode::LSL,
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added: Some(false)
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})
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);
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// #[test]
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// fn ldr_pre_index() {
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// // ldreq r2, [r5, -r6, lsl #5]
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// let decoded = ArmInstruction::decode(0x07_15_22_86, 0).unwrap();
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// assert_eq!(decoded.fmt, ArmFormat::LDR_STR);
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// assert_eq!(decoded.cond, ArmCond::EQ);
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// assert_eq!(decoded.load_flag(), true);
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// assert_eq!(decoded.pre_index_flag(), true);
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// assert_eq!(decoded.write_back_flag(), false);
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// assert_eq!(decoded.rd(), 2);
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// assert_eq!(decoded.rn(), 5);
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// assert_eq!(
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// decoded.ldr_str_offset(),
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// BarrelShifterValue::ShiftedRegister(ShiftedRegister {
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// reg: 6,
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// shift_by: ShiftRegisterBy::ByAmount(5),
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// bs_op: BarrelShiftOpCode::LSL,
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// added: Some(false)
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// })
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// );
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assert_eq!(format!("{}", decoded), "ldreq\tr2, [r5, -r6, lsl #5]");
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// assert_eq!(format!("{}", decoded), "ldreq\tr2, [r5, -r6, lsl #5]");
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let mut core = Core::new();
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core.cpsr.set_Z(true);
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core.gpr[5] = 0x34;
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core.gpr[6] = 1;
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core.gpr[2] = 0;
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// let mut core = Core::new();
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// core.cpsr.set_Z(true);
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// core.gpr[5] = 0x34;
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// core.gpr[6] = 1;
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// core.gpr[2] = 0;
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#[rustfmt::skip]
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let bytes = vec![
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/* 00h: */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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/* 10h: */ 0x00, 0x00, 0x00, 0x00, 0x37, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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/* 20h: */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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/* 30h: */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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];
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let mut mem = BoxedMemory::new(bytes.into_boxed_slice(), 0xffff_ffff);
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// #[rustfmt::skip]
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// let bytes = vec![
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// /* 00h: */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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// /* 10h: */ 0x00, 0x00, 0x00, 0x00, 0x37, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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// /* 20h: */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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// /* 30h: */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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// ];
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// let mut mem = BoxedMemory::new(bytes.into_boxed_slice(), 0xffff_ffff);
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core.exec_arm(&mut mem, decoded).unwrap();
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assert_eq!(core.gpr[2], 0x1337);
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}
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// core.exec_arm(&mut mem, decoded).unwrap();
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// assert_eq!(core.gpr[2], 0x1337);
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// }
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#[test]
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fn str_post_index() {
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// strteq r2, [r4], -r7, asr #8
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let decoded = ArmInstruction::decode(0x06_24_24_47, 0).unwrap();
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assert_eq!(decoded.fmt, ArmFormat::LDR_STR);
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assert_eq!(decoded.cond, ArmCond::EQ);
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assert_eq!(decoded.load_flag(), false);
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assert_eq!(decoded.pre_index_flag(), false);
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assert_eq!(decoded.write_back_flag(), true);
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assert_eq!(decoded.rd(), 2);
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assert_eq!(decoded.rn(), 4);
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assert_eq!(
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decoded.ldr_str_offset(),
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BarrelShifterValue::ShiftedRegister(ShiftedRegister {
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reg: 7,
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shift_by: ShiftRegisterBy::ByAmount(8),
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bs_op: BarrelShiftOpCode::ASR,
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added: Some(false)
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})
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);
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assert_eq!(format!("{}", decoded), "strteq\tr2, [r4], -r7, asr #8");
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// #[test]
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// fn str_post_index() {
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// // strteq r2, [r4], -r7, asr #8
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// let decoded = ArmInstruction::decode(0x06_24_24_47, 0).unwrap();
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// assert_eq!(decoded.fmt, ArmFormat::LDR_STR);
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// assert_eq!(decoded.cond, ArmCond::EQ);
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// assert_eq!(decoded.load_flag(), false);
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// assert_eq!(decoded.pre_index_flag(), false);
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// assert_eq!(decoded.write_back_flag(), true);
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// assert_eq!(decoded.rd(), 2);
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// assert_eq!(decoded.rn(), 4);
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// assert_eq!(
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// decoded.ldr_str_offset(),
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// BarrelShifterValue::ShiftedRegister(ShiftedRegister {
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// reg: 7,
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// shift_by: ShiftRegisterBy::ByAmount(8),
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// bs_op: BarrelShiftOpCode::ASR,
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// added: Some(false)
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// })
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// );
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// assert_eq!(format!("{}", decoded), "strteq\tr2, [r4], -r7, asr #8");
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let mut core = Core::new();
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core.cpsr.set_Z(true);
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core.gpr[4] = 0x0;
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core.gpr[7] = 1;
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core.gpr[2] = 0xabababab;
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// let mut core = Core::new();
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// core.cpsr.set_Z(true);
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// core.gpr[4] = 0x0;
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// core.gpr[7] = 1;
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// core.gpr[2] = 0xabababab;
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#[rustfmt::skip]
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let bytes = vec![
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/* 00h: */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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/* 10h: */ 0x00, 0x00, 0x00, 0x00, 0x37, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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/* 20h: */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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/* 30h: */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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];
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let mut mem = BoxedMemory::new(bytes.into_boxed_slice(), 0xffff_ffff);
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// #[rustfmt::skip]
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// let bytes = vec![
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// /* 00h: */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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// /* 10h: */ 0x00, 0x00, 0x00, 0x00, 0x37, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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// /* 20h: */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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// /* 30h: */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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// ];
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// let mut mem = BoxedMemory::new(bytes.into_boxed_slice(), 0xffff_ffff);
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core.exec_arm(&mut mem, decoded).unwrap();
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assert_eq!(mem.read_32(0), 0xabababab);
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}
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// core.exec_arm(&mut mem, decoded).unwrap();
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// assert_eq!(mem.read_32(0), 0xabababab);
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// }
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#[test]
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fn str_pre_index() {
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// str r4, [sp, 0x10]
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let decoded = ArmInstruction::decode(0xe58d4010, 0).unwrap();
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assert_eq!(decoded.fmt, ArmFormat::LDR_STR);
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assert_eq!(decoded.cond, ArmCond::AL);
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// #[test]
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// fn str_pre_index() {
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// // str r4, [sp, 0x10]
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// let decoded = ArmInstruction::decode(0xe58d4010, 0).unwrap();
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// assert_eq!(decoded.fmt, ArmFormat::LDR_STR);
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// assert_eq!(decoded.cond, ArmCond::AL);
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let mut core = Core::new();
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core.set_reg(4, 0x12345678);
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core.set_reg(REG_SP, 0);
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// let mut core = Core::new();
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// core.set_reg(4, 0x12345678);
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// core.set_reg(REG_SP, 0);
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#[rustfmt::skip]
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let bytes = vec![
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/* 0: */ 0xaa, 0xbb, 0xcc, 0xdd,
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/* 4: */ 0xaa, 0xbb, 0xcc, 0xdd,
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/* 8: */ 0xaa, 0xbb, 0xcc, 0xdd,
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/* c: */ 0xaa, 0xbb, 0xcc, 0xdd,
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/* 10: */ 0xaa, 0xbb, 0xcc, 0xdd,
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];
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let mut mem = BoxedMemory::new(bytes.into_boxed_slice(), 0xffff_ffff);
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// #[rustfmt::skip]
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// let bytes = vec![
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// /* 0: */ 0xaa, 0xbb, 0xcc, 0xdd,
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// /* 4: */ 0xaa, 0xbb, 0xcc, 0xdd,
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// /* 8: */ 0xaa, 0xbb, 0xcc, 0xdd,
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// /* c: */ 0xaa, 0xbb, 0xcc, 0xdd,
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// /* 10: */ 0xaa, 0xbb, 0xcc, 0xdd,
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// ];
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// let mut mem = BoxedMemory::new(bytes.into_boxed_slice(), 0xffff_ffff);
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assert_ne!(mem.read_32(core.get_reg(REG_SP) + 0x10), 0x12345678);
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core.exec_arm(&mut mem, decoded).unwrap();
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assert_eq!(mem.read_32(core.get_reg(REG_SP) + 0x10), 0x12345678);
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}
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}
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// assert_ne!(mem.read_32(core.get_reg(REG_SP) + 0x10), 0x12345678);
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// core.exec_arm(&mut mem, decoded).unwrap();
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// assert_eq!(mem.read_32(core.get_reg(REG_SP) + 0x10), 0x12345678);
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// }
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// }
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@ -198,11 +198,3 @@ impl fmt::Display for CpuError {
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}
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pub type CpuResult<T> = Result<T, CpuError>;
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#[cfg(test)]
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mod tests {
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#[test]
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fn it_works() {
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assert_eq!(2 + 2, 4);
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}
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}
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@ -340,126 +340,126 @@ impl ThumbInstruction {
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}
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}
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#[cfg(test)]
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/// All instructions constants were generated using an ARM assembler.
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mod tests {
|
||||
use super::super::Core;
|
||||
use super::*;
|
||||
use crate::core::sysbus::BoxedMemory;
|
||||
use crate::core::Bus;
|
||||
|
||||
#[test]
|
||||
fn mov_low_reg() {
|
||||
let bytes = vec![];
|
||||
let mut mem = BoxedMemory::new(bytes.into_boxed_slice(), 0xffff_ffff);
|
||||
let mut core = Core::new();
|
||||
core.set_reg(0, 0);
|
||||
|
||||
// movs r0, #0x27
|
||||
let insn = ThumbInstruction::decode(0x2027, 0).unwrap();
|
||||
|
||||
assert_eq!(format!("{}", insn), "mov\tr0, #0x27");
|
||||
core.exec_thumb(&mut mem, insn).unwrap();
|
||||
assert_eq!(core.get_reg(0), 0x27);
|
||||
}
|
||||
// #[cfg(test)]
|
||||
// /// All instructions constants were generated using an ARM assembler.
|
||||
// mod tests {
|
||||
// use super::super::Core;
|
||||
// use super::*;
|
||||
// use crate::core::sysbus::BoxedMemory;
|
||||
// use crate::core::Bus;
|
||||
|
||||
// #[test]
|
||||
// fn decode_add_sub() {
|
||||
// let insn = ThumbInstruction::decode(0xac19, 0).unwrap();
|
||||
// assert!(format!("add\tr4, r4"))
|
||||
// fn mov_low_reg() {
|
||||
// let bytes = vec![];
|
||||
// let mut mem = BoxedMemory::new(bytes.into_boxed_slice(), 0xffff_ffff);
|
||||
// let mut core = Core::new();
|
||||
// core.set_reg(0, 0);
|
||||
|
||||
// // movs r0, #0x27
|
||||
// let insn = ThumbInstruction::decode(0x2027, 0).unwrap();
|
||||
|
||||
// assert_eq!(format!("{}", insn), "mov\tr0, #0x27");
|
||||
// core.exec_thumb(&mut mem, insn).unwrap();
|
||||
// assert_eq!(core.get_reg(0), 0x27);
|
||||
// }
|
||||
|
||||
#[test]
|
||||
fn ldr_pc() {
|
||||
// ldr r0, [pc, #4]
|
||||
let insn = ThumbInstruction::decode(0x4801, 0x6).unwrap();
|
||||
// // #[test]
|
||||
// // fn decode_add_sub() {
|
||||
// // let insn = ThumbInstruction::decode(0xac19, 0).unwrap();
|
||||
// // assert!(format!("add\tr4, r4"))
|
||||
// // }
|
||||
|
||||
#[rustfmt::skip]
|
||||
let bytes = vec![
|
||||
/* 0: */ 0x00, 0x00,
|
||||
/* 2: */ 0x00, 0x00,
|
||||
/* 4: */ 0x00, 0x00,
|
||||
/* 6: <pc> */ 0x00, 0x00,
|
||||
/* 8: */ 0x00, 0x00, 0x00, 0x00,
|
||||
/* c: */ 0x78, 0x56, 0x34, 0x12,
|
||||
];
|
||||
let mut mem = BoxedMemory::new(bytes.into_boxed_slice(), 0xffff_ffff);
|
||||
let mut core = Core::new();
|
||||
core.set_reg(0, 0);
|
||||
// #[test]
|
||||
// fn ldr_pc() {
|
||||
// // ldr r0, [pc, #4]
|
||||
// let insn = ThumbInstruction::decode(0x4801, 0x6).unwrap();
|
||||
|
||||
assert_eq!(format!("{}", insn), "ldr\tr0, [pc, #0x4] ; = #0xc");
|
||||
core.exec_thumb(&mut mem, insn).unwrap();
|
||||
assert_eq!(core.get_reg(0), 0x12345678);
|
||||
}
|
||||
// #[rustfmt::skip]
|
||||
// let bytes = vec![
|
||||
// /* 0: */ 0x00, 0x00,
|
||||
// /* 2: */ 0x00, 0x00,
|
||||
// /* 4: */ 0x00, 0x00,
|
||||
// /* 6: <pc> */ 0x00, 0x00,
|
||||
// /* 8: */ 0x00, 0x00, 0x00, 0x00,
|
||||
// /* c: */ 0x78, 0x56, 0x34, 0x12,
|
||||
// ];
|
||||
// let mut mem = BoxedMemory::new(bytes.into_boxed_slice(), 0xffff_ffff);
|
||||
// let mut core = Core::new();
|
||||
// core.set_reg(0, 0);
|
||||
|
||||
#[test]
|
||||
fn ldr_str_reg_offset() {
|
||||
// str r0, [r4, r1]
|
||||
let str_insn = ThumbInstruction::decode(0x5060, 0x6).unwrap();
|
||||
// ldrb r2, [r4, r1]
|
||||
let ldr_insn = ThumbInstruction::decode(0x5c62, 0x6).unwrap();
|
||||
// assert_eq!(format!("{}", insn), "ldr\tr0, [pc, #0x4] ; = #0xc");
|
||||
// core.exec_thumb(&mut mem, insn).unwrap();
|
||||
// assert_eq!(core.get_reg(0), 0x12345678);
|
||||
// }
|
||||
|
||||
let mut core = Core::new();
|
||||
core.set_reg(0, 0x12345678);
|
||||
core.set_reg(2, 0);
|
||||
core.set_reg(1, 0x4);
|
||||
core.set_reg(4, 0xc);
|
||||
// #[test]
|
||||
// fn ldr_str_reg_offset() {
|
||||
// // str r0, [r4, r1]
|
||||
// let str_insn = ThumbInstruction::decode(0x5060, 0x6).unwrap();
|
||||
// // ldrb r2, [r4, r1]
|
||||
// let ldr_insn = ThumbInstruction::decode(0x5c62, 0x6).unwrap();
|
||||
|
||||
#[rustfmt::skip]
|
||||
let bytes = vec![
|
||||
/* 00h: */ 0xaa, 0xbb, 0xcc, 0xdd,
|
||||
/* 04h: */ 0xaa, 0xbb, 0xcc, 0xdd,
|
||||
/* 08h: */ 0xaa, 0xbb, 0xcc, 0xdd,
|
||||
/* 0ch: */ 0xaa, 0xbb, 0xcc, 0xdd,
|
||||
/* 10h: */ 0xaa, 0xbb, 0xcc, 0xdd,
|
||||
];
|
||||
let mut mem = BoxedMemory::new(bytes.into_boxed_slice(), 0xffff_ffff);
|
||||
// let mut core = Core::new();
|
||||
// core.set_reg(0, 0x12345678);
|
||||
// core.set_reg(2, 0);
|
||||
// core.set_reg(1, 0x4);
|
||||
// core.set_reg(4, 0xc);
|
||||
|
||||
assert_eq!(format!("{}", str_insn), "str\tr0, [r4, r1]");
|
||||
assert_eq!(format!("{}", ldr_insn), "ldrb\tr2, [r4, r1]");
|
||||
core.exec_thumb(&mut mem, str_insn).unwrap();
|
||||
assert_eq!(mem.read_32(0x10), 0x12345678);
|
||||
core.exec_thumb(&mut mem, ldr_insn).unwrap();
|
||||
assert_eq!(core.get_reg(2), 0x78);
|
||||
}
|
||||
// #[rustfmt::skip]
|
||||
// let bytes = vec![
|
||||
// /* 00h: */ 0xaa, 0xbb, 0xcc, 0xdd,
|
||||
// /* 04h: */ 0xaa, 0xbb, 0xcc, 0xdd,
|
||||
// /* 08h: */ 0xaa, 0xbb, 0xcc, 0xdd,
|
||||
// /* 0ch: */ 0xaa, 0xbb, 0xcc, 0xdd,
|
||||
// /* 10h: */ 0xaa, 0xbb, 0xcc, 0xdd,
|
||||
// ];
|
||||
// let mut mem = BoxedMemory::new(bytes.into_boxed_slice(), 0xffff_ffff);
|
||||
|
||||
#[allow(overflowing_literals)]
|
||||
#[test]
|
||||
fn format8() {
|
||||
let mut core = Core::new();
|
||||
#[rustfmt::skip]
|
||||
let bytes = vec![
|
||||
/* 00h: */ 0xaa, 0xbb, 0xcc, 0xdd, 0xaa, 0xbb, 0xcc, 0xdd,
|
||||
/* 08h: */ 0xaa, 0xbb, 0xcc, 0xdd, 0xaa, 0xbb, 0xcc, 0xdd,
|
||||
/* 10h: */ 0xaa, 0xbb, 0xcc, 0xdd, 0xaa, 0xbb, 0xcc, 0xdd,
|
||||
];
|
||||
let mut mem = BoxedMemory::new(bytes.into_boxed_slice(), 0xffff_ffff);
|
||||
// assert_eq!(format!("{}", str_insn), "str\tr0, [r4, r1]");
|
||||
// assert_eq!(format!("{}", ldr_insn), "ldrb\tr2, [r4, r1]");
|
||||
// core.exec_thumb(&mut mem, str_insn).unwrap();
|
||||
// assert_eq!(mem.read_32(0x10), 0x12345678);
|
||||
// core.exec_thumb(&mut mem, ldr_insn).unwrap();
|
||||
// assert_eq!(core.get_reg(2), 0x78);
|
||||
// }
|
||||
|
||||
core.gpr[4] = 0x12345678;
|
||||
core.gpr[3] = 0x2;
|
||||
core.gpr[0] = 0x4;
|
||||
// strh r4, [r3, r0]
|
||||
let decoded = ThumbInstruction::decode(0x521c, 0).unwrap();
|
||||
assert_eq!(format!("{}", decoded), "strh\tr4, [r3, r0]");
|
||||
core.exec_thumb(&mut mem, decoded).unwrap();
|
||||
assert_eq!(&mem.get_bytes(0x6)[..4], [0x78, 0x56, 0xaa, 0xbb]);
|
||||
// #[allow(overflowing_literals)]
|
||||
// #[test]
|
||||
// fn format8() {
|
||||
// let mut core = Core::new();
|
||||
// #[rustfmt::skip]
|
||||
// let bytes = vec![
|
||||
// /* 00h: */ 0xaa, 0xbb, 0xcc, 0xdd, 0xaa, 0xbb, 0xcc, 0xdd,
|
||||
// /* 08h: */ 0xaa, 0xbb, 0xcc, 0xdd, 0xaa, 0xbb, 0xcc, 0xdd,
|
||||
// /* 10h: */ 0xaa, 0xbb, 0xcc, 0xdd, 0xaa, 0xbb, 0xcc, 0xdd,
|
||||
// ];
|
||||
// let mut mem = BoxedMemory::new(bytes.into_boxed_slice(), 0xffff_ffff);
|
||||
|
||||
// ldsb r2, [r7, r1]
|
||||
core.gpr[2] = 0;
|
||||
core.gpr[7] = 0x10;
|
||||
core.gpr[1] = 0x5;
|
||||
let decoded = ThumbInstruction::decode(0x567a, 0).unwrap();
|
||||
assert_eq!(format!("{}", decoded), "ldsb\tr2, [r7, r1]");
|
||||
core.exec_thumb(&mut mem, decoded).unwrap();
|
||||
assert_eq!(core.gpr[2], mem.read_8(0x15) as i8 as u32);
|
||||
// core.gpr[4] = 0x12345678;
|
||||
// core.gpr[3] = 0x2;
|
||||
// core.gpr[0] = 0x4;
|
||||
// // strh r4, [r3, r0]
|
||||
// let decoded = ThumbInstruction::decode(0x521c, 0).unwrap();
|
||||
// assert_eq!(format!("{}", decoded), "strh\tr4, [r3, r0]");
|
||||
// core.exec_thumb(&mut mem, decoded).unwrap();
|
||||
// assert_eq!(&mem.get_bytes(0x6)[..4], [0x78, 0x56, 0xaa, 0xbb]);
|
||||
|
||||
// ldsh r3, [r4, r2]
|
||||
core.gpr[3] = 0x0;
|
||||
core.gpr[4] = 0x0;
|
||||
core.gpr[2] = 0x6;
|
||||
let decoded = ThumbInstruction::decode(0x5ea3, 0).unwrap();
|
||||
assert_eq!(format!("{}", decoded), "ldsh\tr3, [r4, r2]");
|
||||
core.exec_thumb(&mut mem, decoded).unwrap();
|
||||
assert_eq!(core.gpr[3], 0x5678);
|
||||
}
|
||||
}
|
||||
// // ldsb r2, [r7, r1]
|
||||
// core.gpr[2] = 0;
|
||||
// core.gpr[7] = 0x10;
|
||||
// core.gpr[1] = 0x5;
|
||||
// let decoded = ThumbInstruction::decode(0x567a, 0).unwrap();
|
||||
// assert_eq!(format!("{}", decoded), "ldsb\tr2, [r7, r1]");
|
||||
// core.exec_thumb(&mut mem, decoded).unwrap();
|
||||
// assert_eq!(core.gpr[2], mem.read_8(0x15) as i8 as u32);
|
||||
|
||||
// // ldsh r3, [r4, r2]
|
||||
// core.gpr[3] = 0x0;
|
||||
// core.gpr[4] = 0x0;
|
||||
// core.gpr[2] = 0x6;
|
||||
// let decoded = ThumbInstruction::decode(0x5ea3, 0).unwrap();
|
||||
// assert_eq!(format!("{}", decoded), "ldsh\tr3, [r4, r2]");
|
||||
// core.exec_thumb(&mut mem, decoded).unwrap();
|
||||
// assert_eq!(core.gpr[3], 0x5678);
|
||||
// }
|
||||
// }
|
||||
|
|
|
|||
Reference in a new issue