From 1d766e95dedf4d519c7438971f836e21840b31f7 Mon Sep 17 00:00:00 2001
From: Michel Heily <michelheily@gmail.com>
Date: Thu, 27 Jun 2019 15:03:44 +0300
Subject: [PATCH] cpu: Fix bug in psr mode bits

---
 src/arm7tdmi/psr.rs | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/arm7tdmi/psr.rs b/src/arm7tdmi/psr.rs
index c74fc77..ae51441 100644
--- a/src/arm7tdmi/psr.rs
+++ b/src/arm7tdmi/psr.rs
@@ -111,11 +111,11 @@ impl RegPSR {
     }
 
     pub fn mode(&self) -> CpuMode {
-        CpuMode::from_u32(self.raw & 0xb11111).unwrap()
+        CpuMode::from_u32(self.raw.bit_range(0..5)).unwrap()
     }
 
     pub fn set_mode(&mut self, mode: CpuMode) {
-        self.raw |= mode as u32;
+        self.raw.set_bit_range(0..5, (mode as u32) & 0b1_1111);
     }
 
     pub fn irq_disabled(&self) -> bool {