cpu: arm: Fix R14 for branch with link instruction
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@ -42,7 +42,7 @@ impl Core {
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insn: ArmInstruction,
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) -> CpuResult<CpuPipelineAction> {
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if insn.link_flag() {
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self.set_reg(14, self.pc & !0b1);
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self.set_reg(14, (insn.pc + (self.word_size() as u32)) & !0b1);
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}
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// +1N
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