feat(sram): Implement SRAM save type
Tested to work on Kirby. Fixes #8 Former-commit-id: 90aa60b901a4ef790592c34c2350a7349939d612
This commit is contained in:
Michel Heily
parent
70c19ea343
commit
23a6bf1637
118
src/core/backup/mod.rs
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118
src/core/backup/mod.rs
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@ -0,0 +1,118 @@
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use std::fmt;
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use std::fs::{File, OpenOptions};
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use std::io::prelude::*;
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use std::io::SeekFrom;
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use std::path::PathBuf;
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use serde::de::{self, Deserialize, Deserializer, SeqAccess, Visitor};
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use serde::ser::{Serialize, SerializeStruct, Serializer};
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use crate::util::write_bin_file;
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pub mod flash;
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pub const BACKUP_FILE_EXT: &'static str = "sav";
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#[derive(Debug, Primitive, Serialize, Deserialize, Clone)]
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pub enum BackupType {
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Eeprom = 0,
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Sram = 1,
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Flash = 2,
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Flash512 = 3,
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Flash1M = 4,
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}
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#[derive(Debug)]
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pub struct BackupMemory {
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size: usize,
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path: PathBuf,
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file: File,
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buffer: Vec<u8>,
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}
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impl Clone for BackupMemory {
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fn clone(&self) -> Self {
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BackupMemory::new(self.size, self.path.clone())
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}
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}
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impl Serialize for BackupMemory {
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fn serialize<S>(&self, serializer: S) -> Result<S::Ok, S::Error>
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where
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S: Serializer,
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{
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let mut state = serializer.serialize_struct("BackupMemory", 2)?;
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state.serialize_field("size", &self.size)?;
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state.serialize_field("path", &self.path)?;
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state.end()
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}
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}
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impl<'de> Deserialize<'de> for BackupMemory {
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fn deserialize<D>(deserializer: D) -> Result<Self, D::Error>
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where
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D: Deserializer<'de>,
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{
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struct BackupMemoryVisitor;
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impl<'de> Visitor<'de> for BackupMemoryVisitor {
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type Value = BackupMemory;
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fn expecting(&self, formatter: &mut fmt::Formatter) -> fmt::Result {
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formatter.write_str("struct BackupMemory")
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}
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fn visit_seq<V>(self, mut seq: V) -> Result<BackupMemory, V::Error>
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where
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V: SeqAccess<'de>,
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{
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let size = seq
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.next_element()?
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.ok_or_else(|| de::Error::invalid_length(0, &self))?;
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let path: String = seq
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.next_element()?
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.ok_or_else(|| de::Error::invalid_length(1, &self))?;
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Ok(BackupMemory::new(size, PathBuf::from(path)))
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}
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}
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const FIELDS: &'static [&'static str] = &["size", "path"];
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deserializer.deserialize_struct("BackupMemory", FIELDS, BackupMemoryVisitor)
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}
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}
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impl BackupMemory {
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pub fn new(size: usize, path: PathBuf) -> BackupMemory {
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// TODO handle errors without unwrap
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if !path.is_file() {
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write_bin_file(&path, &vec![0xff; size]).unwrap();
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};
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let mut file = OpenOptions::new()
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.read(true)
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.write(true)
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.open(&path)
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.unwrap();
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let mut buffer = Vec::new();
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file.read_to_end(&mut buffer).unwrap();
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buffer.resize(size, 0xff);
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BackupMemory {
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size,
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path,
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file: file,
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buffer: buffer,
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}
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}
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pub fn write(&mut self, offset: usize, value: u8) {
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self.buffer[offset] = value;
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self.file.seek(SeekFrom::Start(offset as u64)).unwrap();
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self.file.write_all(&[value]).unwrap();
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}
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pub fn read(&self, offset: usize) -> u8 {
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self.buffer[offset]
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}
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}
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@ -1,16 +1,19 @@
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use std::fs::File;
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use std::io::prelude::*;
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use std::path::Path;
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use std::path::{Path, PathBuf};
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use std::str::from_utf8;
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use serde::{Deserialize, Serialize};
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use memmem::{Searcher, TwoWaySearcher};
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use num::FromPrimitive;
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use serde::{Deserialize, Serialize};
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use zip::ZipArchive;
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use super::super::util::read_bin_file;
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use super::{Addr, Bus, GBAResult};
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use super::backup::flash::*;
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use super::backup::{BackupMemory, BackupType, BACKUP_FILE_EXT};
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/// From GBATEK
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///
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/// The first 192 bytes at 8000000h-80000BFh in ROM are used as cartridge header. The same header is also used for Multiboot images at 2000000h-20000BFh (plus some additional multiboot entries at 20000C0h and up).
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@ -70,13 +73,24 @@ impl CartridgeHeader {
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}
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}
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#[derive(Debug, Primitive, Serialize, Deserialize, Clone)]
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pub enum BackupType {
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Eeprom = 0,
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Sram = 1,
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Flash = 2,
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Flash512 = 3,
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Flash1M = 4,
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#[derive(Serialize, Deserialize, Clone, Debug)]
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pub enum BackupMedia {
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Sram(BackupMemory),
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Flash,
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Eeprom,
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Undetected,
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}
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impl BackupMedia {
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pub fn type_string(&self) -> &'static str {
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use BackupMedia::*;
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match self {
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Sram(..) => "SRAM",
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Flash => "FLASH",
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Eeprom => "EEPROM",
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Undetected => "Undetected",
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}
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}
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}
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#[derive(Serialize, Deserialize, Clone, Debug)]
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@ -84,6 +98,7 @@ pub struct Cartridge {
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pub header: CartridgeHeader,
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bytes: Box<[u8]>,
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size: usize,
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backup: BackupMedia,
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}
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fn load_rom(path: &Path) -> GBAResult<Vec<u8>> {
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@ -117,48 +132,90 @@ fn load_rom(path: &Path) -> GBAResult<Vec<u8>> {
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impl Cartridge {
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pub fn from_path(rom_path: &Path) -> GBAResult<Cartridge> {
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let rom_bin = load_rom(rom_path)?;
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Ok(Cartridge::from_bytes(&rom_bin))
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Ok(Cartridge::from_bytes(
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&rom_bin,
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Some(rom_path.to_path_buf()),
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))
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}
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pub fn from_bytes(bytes: &[u8]) -> Cartridge {
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let backup = Cartridge::detect_backup_type(&bytes);
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println!("Backup detected: {:?}", backup);
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pub fn from_bytes(bytes: &[u8], rom_path: Option<PathBuf>) -> Cartridge {
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let size = bytes.len();
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let header = CartridgeHeader::parse(&bytes);
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let backup = if let Some(path) = rom_path {
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create_backup(bytes, &path)
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} else {
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BackupMedia::Undetected
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};
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println!("Backup: {}", backup.type_string());
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Cartridge {
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header: header,
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bytes: bytes.into(),
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size: size,
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backup: backup,
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}
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}
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}
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fn detect_backup_type(bin: &[u8]) -> Option<BackupType> {
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fn create_backup(bytes: &[u8], rom_path: &Path) -> BackupMedia {
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let backup_path = rom_path.with_extension(BACKUP_FILE_EXT);
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if let Some(backup_type) = detect_backup_type(bytes) {
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match backup_type {
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BackupType::Flash | BackupType::Flash512 | BackupType::Flash1M => {
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BackupMedia::Flash
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}
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BackupType::Sram => BackupMedia::Sram(BackupMemory::new(0x8000, backup_path)),
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BackupType::Eeprom => BackupMedia::Eeprom,
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}
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} else {
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BackupMedia::Undetected
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}
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}
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fn detect_backup_type(bytes: &[u8]) -> Option<BackupType> {
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const ID_STRINGS: &'static [&'static str] =
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&["EEPROM_V", "SRAM_V", "FLASH_V", "FLASH512_V", "FLASH1M_V"];
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&["EEPROM", "SRAM", "FLASH_", "FLASH512_", "FLASH1M_"];
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for i in 0..5 {
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let search = TwoWaySearcher::new(ID_STRINGS[i].as_bytes());
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match search.search_in(bin) {
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match search.search_in(bytes) {
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Some(_) => return Some(BackupType::from_u8(i as u8).unwrap()),
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_ => {}
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}
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}
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println!("Could not detect backup type");
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return None;
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}
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}
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use super::sysbus::{SRAM_HI, SRAM_LO};
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impl Bus for Cartridge {
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fn read_8(&self, addr: Addr) -> u8 {
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if addr >= (self.size as u32) {
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let offset = (addr & 0x01ff_ffff) as usize;
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match addr & 0xff000000 {
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SRAM_LO | SRAM_HI => match &self.backup {
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BackupMedia::Sram(memory) => memory.read((addr & 0x7FFF) as usize),
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_ => 0,
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},
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_ => {
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if offset >= self.size {
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0xDD // TODO - open bus implementation
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} else {
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self.bytes[addr as usize]
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self.bytes[offset as usize]
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}
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}
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}
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}
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fn write_8(&mut self, addr: Addr, value: u8) {
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self.bytes[addr as usize] = value;
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fn write_8(&mut self, addr: u32, value: u8) {
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let offset = (addr & 0x01ff_ffff) as usize;
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match addr & 0xff000000 {
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SRAM_LO | SRAM_HI => match &mut self.backup {
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BackupMedia::Sram(memory) => memory.write((addr & 0x7FFF) as usize, value),
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_ => {}
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},
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_ => self.bytes[offset] = value,
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};
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}
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}
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@ -189,11 +189,10 @@ mod tests {
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use std::cell::RefCell;
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use std::rc::Rc;
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use super::super::bus::Bus;
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use super::super::arm7tdmi;
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use super::super::bus::Bus;
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use super::super::cartridge::Cartridge;
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struct DummyInterface {}
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impl DummyInterface {
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@ -209,7 +208,7 @@ mod tests {
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fn make_mock_gba(rom: &[u8]) -> GameBoyAdvance {
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let bios = vec![0; 0x4000];
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let cpu = arm7tdmi::Core::new();
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let cartridge = Cartridge::from_bytes(rom);
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let cartridge = Cartridge::from_bytes(rom, None);
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let dummy = Rc::new(RefCell::new(DummyInterface::new()));
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let mut gba = GameBoyAdvance::new(
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cpu,
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@ -1,4 +1,5 @@
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pub mod arm7tdmi;
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mod backup;
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pub mod cartridge;
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pub mod gpu;
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pub mod sound;
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@ -18,10 +18,14 @@ pub const IOMEM_ADDR: u32 = 0x0400_0000;
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pub const PALRAM_ADDR: u32 = 0x0500_0000;
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pub const VRAM_ADDR: u32 = 0x0600_0000;
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pub const OAM_ADDR: u32 = 0x0700_0000;
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pub const GAMEPAK_WS0_ADDR: u32 = 0x0800_0000;
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pub const GAMEPAK_MIRROR_WS0_ADDR: u32 = 0x0900_0000;
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pub const GAMEPAK_WS1_ADDR: u32 = 0x0A00_0000;
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pub const GAMEPAK_WS2_ADDR: u32 = 0x0C00_0000;
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pub const GAMEPAK_WS0_LO: u32 = 0x0800_0000;
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pub const GAMEPAK_WS0_HI: u32 = 0x0900_0000;
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pub const GAMEPAK_WS1_LO: u32 = 0x0A00_0000;
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pub const GAMEPAK_WS1_HI: u32 = 0x0B00_0000;
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pub const GAMEPAK_WS2_LO: u32 = 0x0C00_0000;
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pub const GAMEPAK_WS2_HI: u32 = 0x0D00_0000;
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pub const SRAM_LO: u32 = 0x0E00_0000;
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pub const SRAM_HI: u32 = 0x0F00_0000;
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#[derive(Debug, Copy, Clone)]
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pub enum MemoryAccessType {
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@ -107,21 +111,23 @@ pub struct SysBus {
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bios: BoxedMemory,
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onboard_work_ram: BoxedMemory,
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internal_work_ram: BoxedMemory,
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gamepak: Cartridge,
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cartridge: Cartridge,
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dummy: DummyBus,
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pub trace_access: bool,
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}
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use ansi_term::Colour;
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impl SysBus {
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pub fn new(io: IoDevices, bios_rom: Vec<u8>, gamepak: Cartridge) -> SysBus {
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pub fn new(io: IoDevices, bios_rom: Vec<u8>, cartridge: Cartridge) -> SysBus {
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SysBus {
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io: io,
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bios: BoxedMemory::new(bios_rom.into_boxed_slice()),
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onboard_work_ram: BoxedMemory::new(vec![0; WORK_RAM_SIZE].into_boxed_slice()),
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internal_work_ram: BoxedMemory::new(vec![0; INTERNAL_RAM_SIZE].into_boxed_slice()),
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gamepak: gamepak,
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cartridge: cartridge,
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dummy: DummyBus([0; 4]),
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trace_access: false,
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@ -129,67 +135,93 @@ impl SysBus {
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}
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fn map(&self, addr: Addr) -> (&dyn Bus, Addr) {
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let ofs = addr & 0x00ff_ffff;
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match addr & 0xff000000 {
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BIOS_ADDR => {
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if ofs >= 0x4000 {
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(&self.dummy, ofs) // TODO return last fetched opcode
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if addr >= 0x4000 {
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(&self.dummy, addr) // TODO return last fetched opcode
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} else {
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(&self.bios, ofs)
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(&self.bios, addr)
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}
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}
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EWRAM_ADDR => (&self.onboard_work_ram, ofs & 0x3_ffff),
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IWRAM_ADDR => (&self.internal_work_ram, ofs & 0x7fff),
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EWRAM_ADDR => (&self.onboard_work_ram, addr & 0x3_ffff),
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IWRAM_ADDR => (&self.internal_work_ram, addr & 0x7fff),
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IOMEM_ADDR => (&self.io, {
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if ofs & 0xffff == 0x8000 {
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if addr & 0xffff == 0x8000 {
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0x800
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} else {
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ofs & 0x7ff
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addr & 0x7ff
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}
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}),
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PALRAM_ADDR => (&self.io.gpu.palette_ram, ofs & 0x3ff),
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PALRAM_ADDR => (&self.io.gpu.palette_ram, addr & 0x3ff),
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VRAM_ADDR => (&self.io.gpu.vram, {
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let mut ofs = ofs & ((VIDEO_RAM_SIZE as u32) - 1);
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let mut ofs = addr & ((VIDEO_RAM_SIZE as u32) - 1);
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if ofs > 0x18000 {
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ofs -= 0x8000;
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}
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ofs
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}),
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OAM_ADDR => (&self.io.gpu.oam, ofs & 0x3ff),
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GAMEPAK_WS0_ADDR | GAMEPAK_MIRROR_WS0_ADDR | GAMEPAK_WS1_ADDR | GAMEPAK_WS2_ADDR => {
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(&self.gamepak, addr & 0x01ff_ffff)
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OAM_ADDR => (&self.io.gpu.oam, addr & 0x3ff),
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GAMEPAK_WS0_LO | GAMEPAK_WS0_HI | GAMEPAK_WS1_LO | GAMEPAK_WS1_HI | GAMEPAK_WS2_LO => {
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(&self.cartridge, addr)
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}
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GAMEPAK_WS2_HI => {
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// println!(
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// "[{}] Possible read form EEPROM",
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// Colour::Yellow.bold().paint("warn")
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// );
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(&self.cartridge, addr)
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}
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SRAM_LO | SRAM_HI => (&self.cartridge, addr),
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_ => {
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println!(
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"[{}] Trying to read address {:#x}",
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Colour::Yellow.bold().paint("warn"),
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addr
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);
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(&self.dummy, addr)
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}
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_ => (&self.dummy, ofs),
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}
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}
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/// TODO proc-macro for generating this function
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fn map_mut(&mut self, addr: Addr) -> (&mut dyn Bus, Addr) {
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let ofs = addr & 0x00ff_ffff;
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match addr & 0xff000000 {
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BIOS_ADDR => (&mut self.dummy, ofs),
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EWRAM_ADDR => (&mut self.onboard_work_ram, ofs & 0x3_ffff),
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IWRAM_ADDR => (&mut self.internal_work_ram, ofs & 0x7fff),
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BIOS_ADDR => (&mut self.dummy, addr),
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EWRAM_ADDR => (&mut self.onboard_work_ram, addr & 0x3_ffff),
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IWRAM_ADDR => (&mut self.internal_work_ram, addr & 0x7fff),
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IOMEM_ADDR => (&mut self.io, {
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if ofs & 0xffff == 0x8000 {
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if addr & 0xffff == 0x8000 {
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0x800
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} else {
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ofs & 0x7ff
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addr & 0x7ff
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}
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}),
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PALRAM_ADDR => (&mut self.io.gpu.palette_ram, ofs & 0x3ff),
|
||||
PALRAM_ADDR => (&mut self.io.gpu.palette_ram, addr & 0x3ff),
|
||||
VRAM_ADDR => (&mut self.io.gpu.vram, {
|
||||
let mut ofs = ofs & ((VIDEO_RAM_SIZE as u32) - 1);
|
||||
let mut ofs = addr & ((VIDEO_RAM_SIZE as u32) - 1);
|
||||
if ofs > 0x18000 {
|
||||
ofs -= 0x8000;
|
||||
}
|
||||
ofs
|
||||
}),
|
||||
OAM_ADDR => (&mut self.io.gpu.oam, ofs & 0x3ff),
|
||||
GAMEPAK_WS0_ADDR | GAMEPAK_MIRROR_WS0_ADDR | GAMEPAK_WS1_ADDR | GAMEPAK_WS2_ADDR => {
|
||||
(&mut self.gamepak, addr & 0x01ff_ffff)
|
||||
OAM_ADDR => (&mut self.io.gpu.oam, addr & 0x3ff),
|
||||
GAMEPAK_WS0_LO | GAMEPAK_WS0_HI => (&mut self.dummy, addr),
|
||||
GAMEPAK_WS2_HI => {
|
||||
// println!(
|
||||
// "[{}] Possible write to EEPROM",
|
||||
// Colour::Yellow.bold().paint("warn")
|
||||
// );
|
||||
(&mut self.dummy, addr)
|
||||
}
|
||||
SRAM_LO | SRAM_HI => (&mut self.cartridge, addr),
|
||||
_ => {
|
||||
println!(
|
||||
"[{}] Trying to write {:#x}",
|
||||
Colour::Yellow.bold().paint("warn"),
|
||||
addr
|
||||
);
|
||||
(&mut self.dummy, addr)
|
||||
}
|
||||
_ => (&mut self.dummy, ofs),
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -214,7 +246,7 @@ impl SysBus {
|
|||
cycles += 1;
|
||||
}
|
||||
}
|
||||
GAMEPAK_WS0_ADDR | GAMEPAK_MIRROR_WS0_ADDR => match access.0 {
|
||||
GAMEPAK_WS0_LO | GAMEPAK_WS0_HI => match access.0 {
|
||||
MemoryAccessType::NonSeq => match access.1 {
|
||||
MemoryAccessWidth::MemoryAccess32 => {
|
||||
cycles += nonseq_cycles[self.io.waitcnt.ws0_first_access() as usize];
|
||||
|
|
@ -231,9 +263,40 @@ impl SysBus {
|
|||
}
|
||||
}
|
||||
},
|
||||
GAMEPAK_WS1_ADDR | GAMEPAK_WS2_ADDR => {
|
||||
panic!("unimplemented - need to refactor code with a nice macro :(")
|
||||
GAMEPAK_WS1_LO | GAMEPAK_WS1_HI => match access.0 {
|
||||
MemoryAccessType::NonSeq => match access.1 {
|
||||
MemoryAccessWidth::MemoryAccess32 => {
|
||||
cycles += nonseq_cycles[self.io.waitcnt.ws1_first_access() as usize];
|
||||
cycles += seq_cycles[self.io.waitcnt.ws1_second_access() as usize];
|
||||
}
|
||||
_ => {
|
||||
cycles += nonseq_cycles[self.io.waitcnt.ws1_first_access() as usize];
|
||||
}
|
||||
},
|
||||
MemoryAccessType::Seq => {
|
||||
cycles += seq_cycles[self.io.waitcnt.ws1_second_access() as usize];
|
||||
if access.1 == MemoryAccessWidth::MemoryAccess32 {
|
||||
cycles += seq_cycles[self.io.waitcnt.ws1_second_access() as usize];
|
||||
}
|
||||
}
|
||||
},
|
||||
GAMEPAK_WS2_LO | GAMEPAK_WS2_HI => match access.0 {
|
||||
MemoryAccessType::NonSeq => match access.1 {
|
||||
MemoryAccessWidth::MemoryAccess32 => {
|
||||
cycles += nonseq_cycles[self.io.waitcnt.ws2_first_access() as usize];
|
||||
cycles += seq_cycles[self.io.waitcnt.ws2_second_access() as usize];
|
||||
}
|
||||
_ => {
|
||||
cycles += nonseq_cycles[self.io.waitcnt.ws2_first_access() as usize];
|
||||
}
|
||||
},
|
||||
MemoryAccessType::Seq => {
|
||||
cycles += seq_cycles[self.io.waitcnt.ws2_second_access() as usize];
|
||||
if access.1 == MemoryAccessWidth::MemoryAccess32 {
|
||||
cycles += seq_cycles[self.io.waitcnt.ws2_second_access() as usize];
|
||||
}
|
||||
}
|
||||
},
|
||||
_ => {}
|
||||
}
|
||||
|
||||
|
|
@ -243,32 +306,44 @@ impl SysBus {
|
|||
|
||||
impl Bus for SysBus {
|
||||
fn read_32(&self, addr: Addr) -> u32 {
|
||||
let (dev, addr) = self.map(addr);
|
||||
dev.read_32(addr & 0x1ff_fffc)
|
||||
if addr & 3 != 0 {
|
||||
println!("warn: Unaligned read32 at {:#X}", addr);
|
||||
}
|
||||
let (dev, addr) = self.map(addr & !3);
|
||||
dev.read_32(addr)
|
||||
}
|
||||
|
||||
fn read_16(&self, addr: Addr) -> u16 {
|
||||
let (dev, addr) = self.map(addr);
|
||||
dev.read_16(addr & 0x1ff_fffe)
|
||||
if addr & 1 != 0 {
|
||||
println!("warn: Unaligned read16 at {:#X}", addr);
|
||||
}
|
||||
let (dev, addr) = self.map(addr & !1);
|
||||
dev.read_16(addr)
|
||||
}
|
||||
|
||||
fn read_8(&self, addr: Addr) -> u8 {
|
||||
let (dev, addr) = self.map(addr);
|
||||
dev.read_8(addr & 0x1ff_ffff)
|
||||
dev.read_8(addr)
|
||||
}
|
||||
|
||||
fn write_32(&mut self, addr: Addr, value: u32) {
|
||||
let (dev, addr) = self.map_mut(addr);
|
||||
dev.write_32(addr & 0x1ff_fffc, value);
|
||||
if addr & 3 != 0 {
|
||||
println!("warn: Unaligned write32 at {:#X} (value={:#X}", addr, value);
|
||||
}
|
||||
let (dev, addr) = self.map_mut(addr & !3);
|
||||
dev.write_32(addr, value);
|
||||
}
|
||||
|
||||
fn write_16(&mut self, addr: Addr, value: u16) {
|
||||
let (dev, addr) = self.map_mut(addr);
|
||||
dev.write_16(addr & 0x1ff_fffe, value);
|
||||
if addr & 1 != 0 {
|
||||
println!("warn: Unaligned write16 at {:#X} (value={:#X}", addr, value);
|
||||
}
|
||||
let (dev, addr) = self.map_mut(addr & !1);
|
||||
dev.write_16(addr, value);
|
||||
}
|
||||
|
||||
fn write_8(&mut self, addr: Addr, value: u8) {
|
||||
let (dev, addr) = self.map_mut(addr);
|
||||
dev.write_8(addr & 0x1ff_ffff, value);
|
||||
dev.write_8(addr, value);
|
||||
}
|
||||
}
|
||||
|
|
|
|||
Reference in a new issue