From 24483456ed866d06b8eba4df47fdc4df5aff6828 Mon Sep 17 00:00:00 2001 From: Michel Heily Date: Mon, 22 Jul 2019 20:33:31 +0300 Subject: [PATCH] armwrestler-fix: Fix writeback for LDR where rd==rn Instead of returning an Err, the writeback should just be disabled. Former-commit-id: 91636a4eeaf76d0dbd11d250202671fcf8aaa4e6 --- src/core/arm7tdmi/arm/exec.rs | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/src/core/arm7tdmi/arm/exec.rs b/src/core/arm7tdmi/arm/exec.rs index 3c8a169..6876aa1 100644 --- a/src/core/arm7tdmi/arm/exec.rs +++ b/src/core/arm7tdmi/arm/exec.rs @@ -208,9 +208,8 @@ impl Core { /// For LDR, add y=1S+1N if Rd=R15. fn exec_ldr_str(&mut self, bus: &mut Bus, insn: ArmInstruction) -> CpuExecResult { let mut writeback = insn.write_back_flag(); - if writeback && insn.rd() == insn.rn() { - return Err(CpuError::IllegalInstruction); + writeback = false; } let mut addr = self.get_reg(insn.rn()); @@ -266,7 +265,7 @@ impl Core { fn exec_ldr_str_hs(&mut self, bus: &mut Bus, insn: ArmInstruction) -> CpuExecResult { let mut writeback = insn.write_back_flag(); if writeback && insn.rd() == insn.rn() { - return Err(CpuError::IllegalInstruction); + writeback = false; } let mut addr = self.get_reg(insn.rn());