From 3c3129c73ca458bb4451b09cf68108c56157700e Mon Sep 17 00:00:00 2001
From: Michel Heily <michelheily@gmail.com>
Date: Wed, 20 Nov 2019 05:04:54 +0200
Subject: [PATCH] Minor fixes

Fix LSR integer underflow.
Change SWI LR calculation


Former-commit-id: 6a298719e380c3a01f70c3b05d9f3507638398d5
---
 src/core/arm7tdmi/alu.rs        | 2 +-
 src/core/arm7tdmi/arm/exec.rs   | 2 +-
 src/core/arm7tdmi/cpu.rs        | 1 -
 src/core/arm7tdmi/thumb/exec.rs | 2 +-
 4 files changed, 3 insertions(+), 4 deletions(-)

diff --git a/src/core/arm7tdmi/alu.rs b/src/core/arm7tdmi/alu.rs
index d8553c5..5e45294 100644
--- a/src/core/arm7tdmi/alu.rs
+++ b/src/core/arm7tdmi/alu.rs
@@ -129,7 +129,7 @@ impl Core {
                 self.bs_carry_out = val.bit(31);
                 0
             }
-            x if x < 32 => {
+            1..=31 => {
                 self.bs_carry_out = val >> (amount - 1) & 1 == 1;
                 (val as u32) >> amount
             }
diff --git a/src/core/arm7tdmi/arm/exec.rs b/src/core/arm7tdmi/arm/exec.rs
index dda30a3..c067bc2 100644
--- a/src/core/arm7tdmi/arm/exec.rs
+++ b/src/core/arm7tdmi/arm/exec.rs
@@ -20,7 +20,7 @@ impl Core {
             ArmFormat::B_BL => self.exec_b_bl(bus, insn),
             ArmFormat::DP => self.exec_data_processing(bus, insn),
             ArmFormat::SWI => {
-                self.software_interrupt(bus, insn.pc + 4, insn.swi_comment());
+                self.software_interrupt(bus, self.pc - 4, insn.swi_comment());
                 Ok(())
             }
             ArmFormat::LDR_STR => self.exec_ldr_str(bus, insn),
diff --git a/src/core/arm7tdmi/cpu.rs b/src/core/arm7tdmi/cpu.rs
index 715112f..96749ec 100644
--- a/src/core/arm7tdmi/cpu.rs
+++ b/src/core/arm7tdmi/cpu.rs
@@ -456,7 +456,6 @@ impl Core {
         self.gpr_banked_r13[5] = 0x0300_7f00; // UND
 
         self.gpr[13] = 0x0300_7f00;
-        self.gpr[14] = 0x0800_0000;
         self.pc = 0x0800_0000;
 
         self.cpsr.set(0x5f);
diff --git a/src/core/arm7tdmi/thumb/exec.rs b/src/core/arm7tdmi/thumb/exec.rs
index 4bb62b3..4f8fb83 100644
--- a/src/core/arm7tdmi/thumb/exec.rs
+++ b/src/core/arm7tdmi/thumb/exec.rs
@@ -563,7 +563,7 @@ impl Core {
             ThumbFormat::LdmStm => self.exec_thumb_ldm_stm(bus, insn),
             ThumbFormat::BranchConditional => self.exec_thumb_branch_with_cond(bus, insn),
             ThumbFormat::Swi => {
-                self.software_interrupt(bus, insn.pc + 2, (insn.raw & 0xff) as u32);
+                self.software_interrupt(bus, self.pc - 2, (insn.raw & 0xff) as u32);
                 Ok(())
             }
             ThumbFormat::Branch => self.exec_thumb_branch(bus, insn),