core: arm7tdmi: Force address alignment in memory accesses
Fixes #148 Former-commit-id: 36f33c599cd9a3c51115bf20037bfdce9f581912 Former-commit-id: 24130ddb51ae3dff2c576289b74a8cbd7519593f
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@ -88,12 +88,12 @@ impl<I: MemoryInterface> MemoryInterface for Core<I> {
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#[inline]
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#[inline]
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fn load_16(&mut self, addr: u32, access: MemoryAccess) -> u16 {
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fn load_16(&mut self, addr: u32, access: MemoryAccess) -> u16 {
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self.bus.load_16(addr, access)
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self.bus.load_16(addr & !1, access)
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}
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}
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#[inline]
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#[inline]
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fn load_32(&mut self, addr: u32, access: MemoryAccess) -> u32 {
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fn load_32(&mut self, addr: u32, access: MemoryAccess) -> u32 {
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self.bus.load_32(addr, access)
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self.bus.load_32(addr & !3, access)
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}
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}
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#[inline]
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#[inline]
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@ -102,12 +102,12 @@ impl<I: MemoryInterface> MemoryInterface for Core<I> {
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}
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}
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#[inline]
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#[inline]
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fn store_16(&mut self, addr: u32, value: u16, access: MemoryAccess) {
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fn store_16(&mut self, addr: u32, value: u16, access: MemoryAccess) {
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self.bus.store_16(addr, value, access);
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self.bus.store_16(addr & !1, value, access);
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}
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}
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#[inline]
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#[inline]
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fn store_32(&mut self, addr: u32, value: u32, access: MemoryAccess) {
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fn store_32(&mut self, addr: u32, value: u32, access: MemoryAccess) {
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self.bus.store_32(addr, value, access);
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self.bus.store_32(addr & !3, value, access);
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}
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}
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#[inline]
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#[inline]
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