core/gpu/bugfix: Support firing HBlank IRQs during VBlank
This commit fixes #43 Former-commit-id: 6a4367282c673a35316643e16413f9a602094d9d
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@ -40,8 +40,8 @@ pub mod consts {
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pub const VBLANK_LINES: usize = 68;
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pub(super) const CYCLES_PIXEL: usize = 4;
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pub(super) const CYCLES_HDRAW: usize = 960;
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pub(super) const CYCLES_HBLANK: usize = 272;
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pub(super) const CYCLES_HDRAW: usize = 960 + 46;
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pub(super) const CYCLES_HBLANK: usize = 272 - 46;
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pub(super) const CYCLES_SCANLINE: usize = 1232;
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pub(super) const CYCLES_VDRAW: usize = 197120;
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pub(super) const CYCLES_VBLANK: usize = 83776;
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@ -57,16 +57,29 @@ pub enum PixelFormat {
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}
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#[derive(Serialize, Deserialize, Debug, PartialEq, Copy, Clone)]
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#[serde(deny_unknown_fields)]
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pub enum GpuState {
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HDraw = 0,
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HBlank,
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VBlank,
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VBlankHDraw,
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VBlankHBlank,
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}
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impl Default for GpuState {
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fn default() -> GpuState {
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GpuState::HDraw
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}
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}
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impl GpuState {
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pub fn is_vblank(&self) -> bool {
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match self {
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VBlankHBlank | VBlankHDraw => true,
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_ => false,
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}
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}
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}
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use GpuState::*;
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#[derive(Serialize, Deserialize, Clone)]
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@ -380,8 +393,6 @@ impl Gpu {
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}
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self.cycles_left_for_current_state = CYCLES_HDRAW;
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} else {
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self.state = VBlank;
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// latch BG2/3 reference points on vblank
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for i in 0..2 {
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self.bg_aff[i].internal_x = self.bg_aff[i].x;
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@ -397,20 +408,32 @@ impl Gpu {
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sb.io.dmac.notify_vblank();
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video_device.borrow_mut().render(&self.frame_buffer);
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self.obj_buffer_reset();
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self.cycles_left_for_current_state = CYCLES_SCANLINE;
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self.cycles_left_for_current_state = CYCLES_HDRAW;
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self.state = VBlankHDraw;
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}
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}
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VBlank => {
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if self.vcount < DISPLAY_HEIGHT + VBLANK_LINES - 1 {
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VBlankHDraw => {
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self.cycles_left_for_current_state = CYCLES_HBLANK;
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self.state = VBlankHBlank;
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self.dispstat.set_hblank_flag(true);
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if self.dispstat.hblank_irq_enable() {
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irqs.set_LCD_HBlank(true);
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};
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}
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VBlankHBlank => {
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self.update_vcount(self.vcount + 1, irqs);
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self.cycles_left_for_current_state = CYCLES_SCANLINE;
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if self.vcount < DISPLAY_HEIGHT + VBLANK_LINES - 1 {
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self.dispstat.set_hblank_flag(false);
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self.cycles_left_for_current_state = CYCLES_HDRAW;
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self.state = VBlankHDraw;
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} else {
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self.update_vcount(0, irqs);
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self.dispstat.set_vblank_flag(false);
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self.render_scanline();
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self.state = HDraw;
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self.cycles_left_for_current_state = CYCLES_HDRAW;
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self.state = HDraw;
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}
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}
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};
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@ -138,7 +138,7 @@ impl Bus for IoDevices {
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let index = (io_addr - REG_BG2X_L) / 0x10;
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let t = io.gpu.bg_aff[index as usize].x as u32;
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io.gpu.bg_aff[index as usize].x = ((t & 0xffff0000) + (value as u32)) as i32;
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if io.gpu.state != GpuState::VBlank {
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if !io.gpu.state.is_vblank() {
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io.gpu.bg_aff[index as usize].internal_x = io.gpu.bg_aff[index as usize].x;
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}
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}
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@ -146,7 +146,7 @@ impl Bus for IoDevices {
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let index = (io_addr - REG_BG2X_L) / 0x10;
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let t = io.gpu.bg_aff[index as usize].y as u32;
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io.gpu.bg_aff[index as usize].y = ((t & 0xffff0000) + (value as u32)) as i32;
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if io.gpu.state != GpuState::VBlank {
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if !io.gpu.state.is_vblank() {
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io.gpu.bg_aff[index as usize].internal_y = io.gpu.bg_aff[index as usize].y;
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}
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}
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@ -155,7 +155,7 @@ impl Bus for IoDevices {
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let t = io.gpu.bg_aff[index as usize].x;
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io.gpu.bg_aff[index as usize].x =
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(t & 0xffff) | ((sign_extend_i32((value & 0xfff) as i32, 12)) << 16);
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if io.gpu.state != GpuState::VBlank {
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if !io.gpu.state.is_vblank() {
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io.gpu.bg_aff[index as usize].internal_x = io.gpu.bg_aff[index as usize].x;
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}
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}
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@ -164,7 +164,7 @@ impl Bus for IoDevices {
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let t = io.gpu.bg_aff[index as usize].y;
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io.gpu.bg_aff[index as usize].y =
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(t & 0xffff) | ((sign_extend_i32((value & 0xfff) as i32, 12)) << 16);
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if io.gpu.state != GpuState::VBlank {
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if !io.gpu.state.is_vblank() {
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io.gpu.bg_aff[index as usize].internal_y = io.gpu.bg_aff[index as usize].y;
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}
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}
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