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REPL UI changes

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Former-commit-id: 6852b86541f967785dbffb6833fc2c11fa5dbef3
This commit is contained in:
Michel Heily 2019-07-04 01:37:47 +03:00
parent 3541779fbf
commit 923032f8cf
2 changed files with 43 additions and 24 deletions
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6
src/arm7tdmi/cpu.rs
View file

@ -342,7 +342,7 @@ impl fmt::Display for Core {
writeln!(f, "\tCPSR: {}", self.cpsr)?; writeln!(f, "\tCPSR: {}", self.cpsr)?;
writeln!(f, "\tGeneral Purpose Registers:")?; writeln!(f, "\tGeneral Purpose Registers:")?;
let reg_normal_style = Style::new().bold(); let reg_normal_style = Style::new().bold();
let reg_dirty_style = Colour::Green.bold().on(Colour::Yellow); let reg_dirty_style = Colour::Black.bold().on(Colour::Yellow);
let gpr = self.get_registers(); let gpr = self.get_registers();
for i in 0..15 { for i in 0..15 {
let mut reg_name = reg_string(i).to_string(); let mut reg_name = reg_string(i).to_string();
@ -354,7 +354,7 @@ impl fmt::Display for Core {
&reg_normal_style &reg_normal_style
}; };
let entry = format!("\t{}\t= 0x{:08x}", reg_name, gpr[i]); let entry = format!("\t{:-3} = 0x{:08x}", reg_name, gpr[i]);
write!( write!(
f, f,
@ -363,7 +363,7 @@ impl fmt::Display for Core {
if (i + 1) % 4 == 0 { "\n" } else { "" } if (i + 1) % 4 == 0 { "\n" } else { "" }
)?; )?;
} }
let pc = format!("\tPC\t= 0x{:08x}", self.pc); let pc = format!("\tPC = 0x{:08x}", self.get_next_pc());
writeln!(f, "{}", reg_normal_style.paint(pc)) writeln!(f, "{}", reg_normal_style.paint(pc))
} }
} }

61
src/debugger/command.rs
View file

@ -18,7 +18,7 @@ pub enum DisassMode {
#[derive(Debug, PartialEq, Clone)] #[derive(Debug, PartialEq, Clone)]
pub enum Command { pub enum Command {
Info, Info,
SingleStep(bool), Step(usize),
Continue, Continue,
HexDump(Addr, usize), HexDump(Addr, usize),
Disass(DisassMode, Addr, usize), Disass(DisassMode, Addr, usize),
@ -35,27 +35,36 @@ impl Command {
use Command::*; use Command::*;
match *self { match *self {
Info => println!("{}", debugger.cpu), Info => println!("{}", debugger.cpu),
SingleStep(_cycle) => { Step(count) => {
if let Some(bp) = debugger.check_breakpoint() { for _ in 0..count {
println!("hit breakpoint #0x{:08x}!", bp); if let Some(bp) = debugger.check_breakpoint() {
debugger.delete_breakpoint(bp); println!("hit breakpoint #0x{:08x}!", bp);
} else { debugger.delete_breakpoint(bp);
match debugger.cpu.step_debugger(&mut debugger.sysbus) { } else {
Ok(insn) => { match debugger.cpu.step_debugger(&mut debugger.sysbus) {
println!("{}\n", debugger.cpu); Ok(insn) => {
println!( print!(
"Executed at @0x{:08x}:\t{}", "{}\t{}",
insn.get_pc(), Colour::Black
Colour::Yellow.italic().paint(format!("{} ", insn)) .bold()
); .italic()
println!("Next instruction at @0x{:08x}", debugger.cpu.get_next_pc()) .on(Colour::White)
} .paint(format!("Executed at @0x{:08x}:", insn.get_pc(),)),
Err(e) => { insn
println!("{}: {}", "cpu encountered an error".red(), e); );
println!("cpu: {:x?}", debugger.cpu) println!("{}", Colour::Purple.dimmed().italic().paint(format!(
"\t\t/// Next instruction at @0x{:08x}",
debugger.cpu.get_next_pc()
)))
}
Err(e) => {
println!("{}: {}", "cpu encountered an error".red(), e);
println!("cpu: {:x?}", debugger.cpu)
}
} }
} }
} }
println!("{}\n", debugger.cpu);
} }
Continue => loop { Continue => loop {
if let Some(bp) = debugger.check_breakpoint() { if let Some(bp) = debugger.check_breakpoint() {
@ -171,8 +180,18 @@ impl Debugger {
match command.as_ref() { match command.as_ref() {
"i" | "info" => Ok(Command::Info), "i" | "info" => Ok(Command::Info),
"s" | "step" => Ok(Command::SingleStep(false)), "s" | "step" => {
"sc" | "stepcycle" => Ok(Command::SingleStep(true)), let count = match args.len() {
0 => 1,
1 => self.val_number(&args[0])?,
_ => {
return Err(DebuggerError::InvalidCommandFormat(
"step [count]".to_string(),
))
}
};
Ok(Command::Step(count as usize))
}
"c" | "continue" => Ok(Command::Continue), "c" | "continue" => Ok(Command::Continue),
"x" | "hexdump" => { "x" | "hexdump" => {
let (addr, n) = match args.len() { let (addr, n) = match args.len() {