From 984b17fa391da9dcecc4179dd62e847600be9552 Mon Sep 17 00:00:00 2001
From: Michel Heily <michelheily@gmail.com>
Date: Thu, 4 Jul 2019 01:56:11 +0300
Subject: [PATCH] Fix arm mode STR insn

Former-commit-id: 80903a9054e9b0dac07a5e2bb3cff7b0e722d438
---
 src/arm7tdmi/arm/exec.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/arm7tdmi/arm/exec.rs b/src/arm7tdmi/arm/exec.rs
index 04beb71..10a8f20 100644
--- a/src/arm7tdmi/arm/exec.rs
+++ b/src/arm7tdmi/arm/exec.rs
@@ -348,7 +348,7 @@ impl Core {
             }
         } else {
             self.add_cycles(addr, sysbus, NonSeq + MemoryAccess32);
-            let value = self.get_reg(insn.rn());
+            let value = self.get_reg(insn.rd());
             if insn.transfer_size() == 1 {
                 // +1N
                 self.add_cycles(dest, sysbus, NonSeq + MemoryAccess8);