chore: Replace trace exception with trace!

Former-commit-id: 0b6f2126a6861b8f31f5231b5e0cfda3df30d5d5

src/core/arm7tdmi/exception.rs

@@ -30,7 +30,6 @@ impl Core {
             Irq => (CpuMode::Irq, true, false),
             Fiq => (CpuMode::Fiq, true, true),
         };
-        if self.trace_exceptions {
         trace!(
             "{}: {:?}, pc: {:#x}, new_mode: {:?} old_mode: {:?}",
             "Exception".cyan(),
@@ -39,7 +38,6 @@ impl Core {
             new_mode,
             self.cpsr.mode(),
         );
-        }
 
         let new_bank = new_mode.bank_index();
         self.spsr_bank[new_bank] = self.cpsr;