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Remove old gdbstub

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Former-commit-id: d3b35aa75f4560a407478d54439ca8218e04e19e
Former-commit-id: c72b109e16c6cf844d4c99c38473c61c4c113c42
This commit is contained in:
Michel Heily 2022-09-16 12:21:13 +03:00
parent de82bb171c
commit 9abc08fffe
3 changed files with 3 additions and 180 deletions
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15
Cargo.lock generated
View file

@ -79,7 +79,7 @@ dependencies = [
"cfg-if 1.0.0",
"colored 1.9.3",
"enum-primitive-derive",
"gdbstub 0.6.3",
"gdbstub",
"gdbstub_arch",
"log 0.4.11",
"num",
@ -647,16 +647,6 @@ dependencies = [
"thread_local",
]
[[package]]
name = "gdbstub"
version = "0.1.2"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "0cdb70c5cea5faa069cd8a24444b8dee8635c9da6c9d1257008e980ec62bcf14"
dependencies = [
"log 0.4.11",
"num-traits 0.2.12",
]
[[package]]
name = "gdbstub"
version = "0.6.3"
@ -677,7 +667,7 @@ version = "0.2.4"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "eecb536c55c43593a00dde9074dbbdb0e81ce5f20dbca921400f8779c21dea9c"
dependencies = [
"gdbstub 0.6.3",
"gdbstub",
"num-traits 0.2.12",
]
@ -1355,7 +1345,6 @@ dependencies = [
"debug_stub_derive",
"enum-primitive-derive",
"fuzzy-matcher",
"gdbstub 0.1.2",
"hex-literal",
"hexdump",
"lazy_static",

4
core/Cargo.toml
View file

@ -36,7 +36,6 @@ sha2 = "0.8.1"
hex-literal = "0.2.1"
rustyline = { version = "6.0.0", optional = true }
nom = { version = "5.0.0", optional = true }
gdbstub = { version = "0.1.2", optional = true, features = ["std"] }
fuzzy-matcher = { version = "0.3.4", optional = true }
bit_reverse = "0.1.8"
yaml-rust = "0.4"
@ -53,5 +52,4 @@ harness = false
[features]
default = []
elf_support = []
debugger = ["nom", "rustyline", "fuzzy-matcher", "elf_support"]
gdb = ["gdbstub"]
debugger = ["nom", "rustyline", "fuzzy-matcher", "elf_support"]

164
core/src/gdb.rs
View file

@ -1,164 +0,0 @@
use super::arm7tdmi::CpuState;
use super::GameBoyAdvance;
use super::interrupt::*;
use super::iodev::IoDevices;
use super::sysbus::SysBus;
use super::Bus;
use byteorder::{LittleEndian, ReadBytesExt};
use gdbstub::{Access, Target, TargetState};
use std::io::Cursor;
use gdbstub;
use gdbstub::GdbStub;
use std::fmt;
use std::net::TcpListener;
use std::net::ToSocketAddrs;
pub fn spawn_and_run_gdb_server<A: ToSocketAddrs + fmt::Display>(
#[allow(unused)] target: &mut GameBoyAdvance,
#[allow(unused)] addr: A,
) -> Result<(), Box<dyn std::error::Error>> {
#[cfg(feature = "gdb")]
{
info!("spawning gdbserver, listening on {}", addr);
let sock = TcpListener::bind(addr)?;
let (stream, addr) = sock.accept()?;
info!("got connection from {}", addr);
let mut gdb = GdbStub::new(stream);
let result = match gdb.run(target) {
Ok(state) => {
info!("Disconnected from GDB. Target state: {:?}", state);
Ok(())
}
Err(gdbstub::Error::TargetError(e)) => Err(e),
Err(e) => return Err(e.into()),
};
info!("Debugger session ended, result={:?}", result);
}
#[cfg(not(feature = "gdb"))]
{
error!("failed. please compile me with 'gdb' feature")
}
Ok(())
}
impl Target for GameBoyAdvance {
type Usize = u32;
type Error = ();
fn step(
&mut self,
mut _log_mem_access: impl FnMut(Access<u32>),
) -> Result<TargetState, Self::Error> {
static mut S_TOTAL_CYCLES: usize = 0;
let io = unsafe {
let ptr = &mut *self.sysbus as *mut SysBus;
&mut (*ptr).io as &mut IoDevices
};
// clear any pending DMAs
let mut irqs = IrqBitmask(0);
while io.dmac.is_active() {
io.dmac.perform_work(&mut self.sysbus, &mut irqs);
}
io.intc.request_irqs(irqs);
// run the CPU, ignore haltcnt
let cycles = self.step_cpu(io);
io.timers.update(cycles, &mut self.sysbus, &mut irqs);
unsafe {
S_TOTAL_CYCLES += cycles;
}
if self.cycles_to_next_event <= unsafe { S_TOTAL_CYCLES } {
let mut cycles_to_next_event = std::usize::MAX;
io.gpu.update(
unsafe { S_TOTAL_CYCLES },
&mut self.sysbus,
&mut irqs,
&mut cycles_to_next_event,
&self.video_device,
);
io.sound.update(
unsafe { S_TOTAL_CYCLES },
&mut cycles_to_next_event,
&self.audio_device,
);
self.cycles_to_next_event = cycles_to_next_event;
unsafe {
S_TOTAL_CYCLES = 0;
};
} else {
self.cycles_to_next_event -= unsafe { S_TOTAL_CYCLES };
}
io.intc.request_irqs(irqs);
Ok(TargetState::Running)
}
fn read_pc(&mut self) -> u32 {
self.cpu.get_next_pc()
}
// read the specified memory addresses from the target
fn read_addrs(&mut self, addr: std::ops::Range<u32>, mut push_byte: impl FnMut(u8)) {
for addr in addr {
push_byte(self.sysbus.read_8(addr))
}
}
// write data to the specified memory addresses
fn write_addrs(&mut self, mut get_addr_val: impl FnMut() -> Option<(u32, u8)>) {
while let Some((addr, val)) = get_addr_val() {
self.sysbus.write_8(addr, val);
}
}
fn read_registers(&mut self, mut push_reg: impl FnMut(&[u8])) {
// general purpose registers
for i in 0..15 {
push_reg(&self.cpu.get_reg(i).to_le_bytes());
}
push_reg(&self.cpu.get_next_pc().to_le_bytes());
// Floating point registers, unused
for _ in 0..25 {
push_reg(&[0, 0, 0, 0]);
}
push_reg(&self.cpu.cpsr.get().to_le_bytes());
}
fn write_registers(&mut self, regs: &[u8]) {
let mut rdr = Cursor::new(regs);
for i in 0..15 {
self.cpu.set_reg(i, rdr.read_u32::<LittleEndian>().unwrap());
}
let new_pc = rdr.read_u32::<LittleEndian>().unwrap();
self.cpu.set_reg(15, new_pc);
self.cpu.cpsr.set(rdr.read_u32::<LittleEndian>().unwrap());
match self.cpu.cpsr.state() {
CpuState::ARM => self.cpu.reload_pipeline32(&mut self.sysbus),
CpuState::THUMB => self.cpu.reload_pipeline16(&mut self.sysbus),
};
}
fn target_description_xml() -> Option<&'static str> {
Some(
r#"
<target version="1.0">
<architecture>armv4t</architecture>
</target>"#,
)
}
}