arm: finish converting all instructions to const-generics
Former-commit-id: 4557ecffb89d563357f5bd769515254533a404ac Former-commit-id: 8ce461f1b48ff5e7c72cdcd3069dcee0960dbc8e
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@ -305,10 +305,10 @@ fn arm_decode(i: u32) -> (&'static str, String) {
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let is_op_not_touching_rd = i.bit_range(21..25) & 0b1100 == 0b1000;
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if !set_cond_flags && is_op_not_touching_rd {
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if i.bit(21) {
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// Since bit-16 is ignored and we can't know statically if this is a exec_arm_transfer_to_status or exec_arm_transfer_to_status
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("MoveToStatus", String::from("exec_arm_transfer_to_status"))
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("MoveToStatus", format!("exec_arm_transfer_to_status::<{IMM}, {SPSR_FLAG}>",
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IMM = i.bit(25), SPSR_FLAG = i.bit(22)))
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} else {
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("MoveFromStatus", String::from("exec_arm_mrs"))
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("MoveFromStatus", format!("exec_arm_mrs::<{SPSR_FLAG}>", SPSR_FLAG = i.bit(22)))
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}
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} else {
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("DataProcessing", format!("exec_arm_data_processing::<{OP}, {IMM}, {SET_FLAGS}, {SHIFT_BY_REG}>",
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@ -75,9 +75,9 @@ impl<I: MemoryInterface> Core<I> {
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/// Move from status register
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/// 1S
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pub fn exec_arm_mrs(&mut self, insn: u32) -> CpuAction {
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pub fn exec_arm_mrs<const SPSR_FLAG: bool>(&mut self, insn: u32) -> CpuAction {
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let rd = insn.bit_range(12..16) as usize;
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let result = if insn.spsr_flag() {
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let result = if SPSR_FLAG {
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self.spsr.get()
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} else {
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self.cpsr.get()
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@ -87,9 +87,13 @@ impl<I: MemoryInterface> Core<I> {
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CpuAction::AdvancePC(Seq)
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}
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#[inline(always)]
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fn decode_msr_param(&mut self, insn: u32) -> u32 {
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if insn.bit(25) {
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/// Move to status register
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/// 1S
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pub fn exec_arm_transfer_to_status<const IMM: bool, const SPSR_FLAG: bool>(
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&mut self,
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insn: u32,
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) -> CpuAction {
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let value = if IMM {
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let immediate = insn & 0xff;
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let rotate = 2 * insn.bit_range(8..12);
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let mut carry = self.cpsr.C();
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@ -98,13 +102,7 @@ impl<I: MemoryInterface> Core<I> {
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v
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} else {
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self.get_reg((insn & 0b1111) as usize)
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}
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}
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/// Move to status register
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/// 1S
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pub fn exec_arm_transfer_to_status(&mut self, insn: u32) -> CpuAction {
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let value = self.decode_msr_param(insn);
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};
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let f = insn.bit(19);
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let s = insn.bit(18);
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@ -125,17 +123,15 @@ impl<I: MemoryInterface> Core<I> {
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mask |= 0xff << 0;
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}
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let is_spsr = insn.spsr_flag();
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match self.cpsr.mode() {
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CpuMode::User => {
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if is_spsr {
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if SPSR_FLAG {
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panic!("User mode can't access SPSR")
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}
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self.cpsr.set_flag_bits(value);
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}
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_ => {
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if is_spsr {
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if SPSR_FLAG {
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self.spsr.set(value);
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} else {
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let old_mode = self.cpsr.mode();
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