Flush pipelines when entering an exception

Former-commit-id: c00754b8156ecac66cc0a72f6a7c73ee700448f0

src/arm7tdmi/exception.rs

@@ -49,5 +49,7 @@ impl Core {
 
         // Set PC to vector address
         self.pc = vector;
+        self.pipeline_arm.flush();
+        self.pipeline_thumb.flush();
     }
 }