bugfix: Fix improper write to DISPSTAT register
For some reason, probably typing mistkae, I `or`ed the value being written to DISPSTAT, causing bits to never actually turn off, affectivly making HBLANK/VBLANK interrupts linger forever. This probably has caused some nasty glitches that I don't even know of, but two confirm issues solved by this are Mariokart and Pacman. This commit fixes #14 and #13 Former-commit-id: 72ad6efcb9e8f6b582d9279c5daab2603d5a408e
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@ -121,7 +121,7 @@ impl Bus for IoDevices {
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let io_addr = addr + IO_BASE;
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match io_addr {
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REG_DISPCNT => io.gpu.dispcnt.0 = value,
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REG_DISPSTAT => io.gpu.dispstat.0 |= value & !3,
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REG_DISPSTAT => io.gpu.dispstat.0 = value & !3,
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REG_BG0CNT => io.gpu.backgrounds[0].bgcnt.0 = value,
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REG_BG1CNT => io.gpu.backgrounds[1].bgcnt.0 = value,
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REG_BG2CNT => io.gpu.backgrounds[2].bgcnt.0 = value,
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