arm7tdmi small fixes

Former-commit-id: cf1e2f885c6ea6574fb1bbcab395ef2b8cb6c81d
Former-commit-id: 3738bcf43df5af77ad30c2388e52ff2e3a6f110a
This commit is contained in:
Michel Heily 2022-09-11 23:06:56 +03:00
parent c11cdc45dc
commit c9bfa05ca7
3 changed files with 8 additions and 6 deletions

View file

@ -6,9 +6,13 @@ use log::info;
mod breakpoints; mod breakpoints;
pub mod target; pub mod target;
// Re-export the gdbstub crate
pub extern crate gdbstub;
pub extern crate gdbstub_arch;
/// Wait for tcp connection on port /// Wait for tcp connection on port
pub fn wait_for_connection(port: u16) -> io::Result<TcpStream> { pub fn wait_for_connection(port: u16) -> io::Result<TcpStream> {
let bind_addr = format!("localhost:{port}"); let bind_addr = format!("0.0.0.0:{port}");
let sock = TcpListener::bind(bind_addr)?; let sock = TcpListener::bind(bind_addr)?;
info!("waiting for connection"); info!("waiting for connection");

View file

@ -18,7 +18,7 @@ pub trait MemoryGdbInterface: MemoryInterface + DebugRead {
impl<I: MemoryGdbInterface> Target for Arm7tdmiCore<I> { impl<I: MemoryGdbInterface> Target for Arm7tdmiCore<I> {
type Error = (); type Error = ();
type Arch = gdbstub_arch::arm::Armv4t; // as an example type Arch = gdbstub_arch::arm::Armv4t;
#[inline(always)] #[inline(always)]
fn base_ops(&mut self) -> BaseOps<Self::Arch, Self::Error> { fn base_ops(&mut self) -> BaseOps<Self::Arch, Self::Error> {

View file

@ -75,9 +75,7 @@ impl MemoryGdbInterface for SimpleMemory {
"http://sourceware.org/gdb/gdb-memory-map.dtd"> "http://sourceware.org/gdb/gdb-memory-map.dtd">
<memory-map> <memory-map>
<memory type="ram" start="0x0" length="{}"/> <memory type="ram" start="0x0" length="{}"/>
</memory-map>"#, self.data.len()) </memory-map>"#, self.data.len());
.trim() copy_range_to_buf(memory_map.trim().as_bytes(), offset, length, buf)
.as_bytes();
copy_range_to_buf(memory_map, offset, length, buf)
} }
} }