From cb2b97e0c7e1be14ecf0b55d334de14ac6bc15c0 Mon Sep 17 00:00:00 2001 From: Michel Heily Date: Tue, 24 Nov 2020 00:54:18 +0200 Subject: [PATCH] [perf] core: arm7tdmi: Re-arange some fields inside of CPU Also, clean up some of the cfg(debug) mess benchmark report: run_60_frames time: [110.61 ms 111.01 ms 111.42 ms] change: [-7.1171% -6.5425% -5.9132%] (p = 0.00 < 0.05) Performance has improved. Former-commit-id: 9cb82e483c8a78632d0deae20adca9fc1843a76b Former-commit-id: 6d9be5ddaf72f2b9c02063fa067f2ffbaea4fdb6 --- core/src/arm7tdmi/cpu.rs | 69 +++++++++++++++++++--------------------- 1 file changed, 32 insertions(+), 37 deletions(-) diff --git a/core/src/arm7tdmi/cpu.rs b/core/src/arm7tdmi/cpu.rs index 0672b43..afe8f3e 100644 --- a/core/src/arm7tdmi/cpu.rs +++ b/core/src/arm7tdmi/cpu.rs @@ -82,11 +82,37 @@ pub struct SavedCpuState { pub cpsr: RegPSR, pub(super) spsr: RegPSR, - pub(super) banks: Box, + pub(super) banks: BankedRegisters, pub(super) bs_carry_out: bool, } +#[derive(Clone, Debug)] +#[cfg(feature = "debugger")] +struct DebuggerInfo { + last_executed: Option, + /// store the gpr before executing an instruction to show diff in the Display impl + gpr_previous: [u32; 15], + breakpoints: Vec, + verbose: bool, + trace_opcodes: bool, + trace_exceptions: bool, +} + +#[cfg(feature = "debugger")] +impl Default for DebuggerInfo { + fn default() -> DebuggerInfo { + DebuggerInfo { + last_executed: None, + gpr_previous: [0; 15], + breakpoints: Vec::new(), + verbose: false, + trace_opcodes: false, + trace_exceptions: false, + } + } +} + #[derive(Clone, Debug)] pub struct Core { pub(super) bus: Shared, @@ -102,21 +128,10 @@ pub struct Core { // Todo - do I still need this? pub(super) bs_carry_out: bool, - pub(super) banks: Box, // Putting these in a box so the most-used Cpu fields in the same cacheline + pub(super) banks: BankedRegisters, #[cfg(feature = "debugger")] - pub last_executed: Option, - /// store the gpr before executing an instruction to show diff in the Display impl - #[cfg(feature = "debugger")] - gpr_previous: [u32; 15], - #[cfg(feature = "debugger")] - pub breakpoints: Vec, - #[cfg(feature = "debugger")] - pub verbose: bool, - #[cfg(feature = "debugger")] - pub trace_opcodes: bool, - #[cfg(feature = "debugger")] - pub trace_exceptions: bool, + pub dbg_info: DebuggerInfo, } impl Core { @@ -130,21 +145,11 @@ impl Core { next_fetch_access: MemoryAccess::NonSeq, cpsr, spsr: Default::default(), - banks: Box::new(BankedRegisters::default()), + banks: BankedRegisters::default(), bs_carry_out: false, #[cfg(feature = "debugger")] - last_executed: None, - #[cfg(feature = "debugger")] - gpr_previous: [0; 15], - #[cfg(feature = "debugger")] - breakpoints: Vec::new(), - #[cfg(feature = "debugger")] - verbose: false, - #[cfg(feature = "debugger")] - trace_opcodes: false, - #[cfg(feature = "debugger")] - trace_exceptions: false, + dbg_info: DebuggerInfo::default(), } } @@ -168,17 +173,7 @@ impl Core { // savestate does not keep debugger related information, so just reinitialize to default #[cfg(feature = "debugger")] - last_executed: None, - #[cfg(feature = "debugger")] - gpr_previous: [0; 15], - #[cfg(feature = "debugger")] - breakpoints: Vec::new(), - #[cfg(feature = "debugger")] - verbose: false, - #[cfg(feature = "debugger")] - trace_opcodes: false, - #[cfg(feature = "debugger")] - trace_exceptions: false, + dbg_info: DebuggerInfo::default(), } }