From d9ce1c7d8da5b80da2f63110322ffc4a8d0a8fed Mon Sep 17 00:00:00 2001
From: Michel Heily <michelheily@gmail.com>
Date: Sat, 28 Mar 2020 15:42:31 +0300
Subject: [PATCH] optimize/arm: Improve arm instruction condition check.

Obviously AL(always) instructions are the most common, so prioritize checking these first.


Former-commit-id: e236f1e116dbf65757a68dda9090645d220a1cee
---
 src/core/arm7tdmi/arm/exec.rs | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/src/core/arm7tdmi/arm/exec.rs b/src/core/arm7tdmi/arm/exec.rs
index 325733c..8da0674 100644
--- a/src/core/arm7tdmi/arm/exec.rs
+++ b/src/core/arm7tdmi/arm/exec.rs
@@ -1,6 +1,7 @@
 use crate::bit::BitIndex;
 
 use super::super::alu::*;
+use super::ArmCond;
 use crate::core::arm7tdmi::psr::RegPSR;
 use crate::core::arm7tdmi::CpuAction;
 use crate::core::arm7tdmi::{Addr, Core, CpuMode, CpuState, REG_LR, REG_PC};
@@ -11,9 +12,11 @@ use super::*;
 
 impl Core {
     pub fn exec_arm(&mut self, bus: &mut SysBus, insn: ArmInstruction) -> CpuAction {
-        if !self.check_arm_cond(insn.cond) {
-            self.S_cycle32(bus, self.pc);
-            return CpuAction::AdvancePC;
+        if insn.cond != ArmCond::AL {
+            if !self.check_arm_cond(insn.cond) {
+                self.S_cycle32(bus, self.pc);
+                return CpuAction::AdvancePC;
+            }
         }
         match insn.fmt {
             ArmFormat::BX => self.exec_bx(bus, insn),