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Fix accesses outside of IO region

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Former-commit-id: dc874b6d28370cf7256156f2502bd2dc56a0a3fd
This commit is contained in:
Michel Heily 2019-11-16 18:06:49 +02:00
parent b9d0857acc
commit f7dc417e94
1 changed files with 17 additions and 12 deletions
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29
src/core/iodev.rs
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@ -54,6 +54,9 @@ impl Bus for IoDevices {
fn read_16(&self, addr: Addr) -> u16 { fn read_16(&self, addr: Addr) -> u16 {
let io = self; let io = self;
let io_addr = addr + IO_BASE; let io_addr = addr + IO_BASE;
if addr > 0x0800 {
return 0;
}
match io_addr { match io_addr {
REG_DISPCNT => io.gpu.dispcnt.0, REG_DISPCNT => io.gpu.dispcnt.0,
REG_DISPSTAT => io.gpu.dispstat.0, REG_DISPSTAT => io.gpu.dispstat.0,
@ -99,12 +102,12 @@ impl Bus for IoDevices {
REG_HALTCNT => 0, REG_HALTCNT => 0,
REG_KEYINPUT => io.keyinput as u16, REG_KEYINPUT => io.keyinput as u16,
_ => { _ => {
println!( // println!(
"Unimplemented read from {:x} {}", // "Unimplemented read from {:x} {}",
io_addr, // io_addr,
io_reg_string(io_addr) // io_reg_string(io_addr)
); // );
io.mem.read_16(addr) 0
} }
} }
} }
@ -125,7 +128,9 @@ impl Bus for IoDevices {
fn write_16(&mut self, addr: Addr, value: u16) { fn write_16(&mut self, addr: Addr, value: u16) {
let mut io = self; let mut io = self;
io.mem.write_16(addr, value); if addr > 0x0800 {
return;
}
let io_addr = addr + IO_BASE; let io_addr = addr + IO_BASE;
match io_addr { match io_addr {
REG_DISPCNT => io.gpu.dispcnt.0 = value, REG_DISPCNT => io.gpu.dispcnt.0 = value,
@ -241,11 +246,11 @@ impl Bus for IoDevices {
} }
} }
_ => { _ => {
println!( // println!(
"Unimplemented write to {:x} {}", // "Unimplemented write to {:x} {}",
io_addr, // io_addr,
io_reg_string(io_addr) // io_reg_string(io_addr)
); // );
} }
} }
} }