Fix timer bugs
Former-commit-id: 9839368895dca306b66a095ab0b9386c77bd2c12
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@ -237,19 +237,19 @@ impl Bus for IoRegs {
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REG_TM1CNT_L => {
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io.timers[1].timer_data = value;
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io.timers[0].initial_data = value;
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io.timers[1].initial_data = value;
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}
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REG_TM1CNT_H => io.timers[1].timer_ctl.0 = value,
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REG_TM2CNT_L => {
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io.timers[2].timer_data = value;
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io.timers[0].initial_data = value;
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io.timers[2].initial_data = value;
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}
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REG_TM2CNT_H => io.timers[2].timer_ctl.0 = value,
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REG_TM3CNT_L => {
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io.timers[3].timer_data = value;
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io.timers[0].initial_data = value;
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io.timers[3].initial_data = value;
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}
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REG_TM3CNT_H => io.timers[3].timer_ctl.0 = value,
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@ -20,7 +20,7 @@ pub struct Timer {
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}
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pub enum TimerAction {
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Overflow,
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Overflow(usize),
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Increment,
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}
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@ -50,6 +50,7 @@ impl Timer {
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}
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pub fn add_cycles(&mut self, cycles: usize, irqs: &mut IrqBitmask) -> TimerAction {
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let mut num_overflows = 0;
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self.cycles += cycles;
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let frequency = self.frequency();
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@ -60,13 +61,16 @@ impl Timer {
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if self.timer_ctl.irq_enabled() {
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irqs.add_irq(self.get_irq());
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}
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println!("timer{} overflow", self.timer_id);
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return TimerAction::Overflow;
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self.timer_data = self.initial_data;
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num_overflows += 1;
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}
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}
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if num_overflows > 0 {
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return TimerAction::Overflow(num_overflows);
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} else {
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return TimerAction::Increment;
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}
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}
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}
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#[derive(Debug)]
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@ -96,16 +100,20 @@ impl SyncedIoDevice for Timers {
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for i in 0..4 {
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if self[i].timer_ctl.enabled() && !self[i].timer_ctl.cascade() {
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match self[i].add_cycles(cycles, irqs) {
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TimerAction::Overflow => match i {
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TimerAction::Overflow(num_overflows) => {
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println!("timer{} overflowed {} times", i, num_overflows);
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match i {
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3 => {}
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_ => {
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let next_i = i +1;
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let next_i = i + 1;
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if self[next_i].timer_ctl.cascade() {
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println!("{:?} is cascade!", self[next_i]);
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self[next_i].add_cycles(1, irqs);
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println!("cascading into timer{}", next_i);
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self[next_i].add_cycles(num_overflows, irqs);
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}
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}
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},
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}
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}
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TimerAction::Increment => {}
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_ => {}
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}
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}
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