Commit graph

70 commits

Author SHA1 Message Date
Michel Heily 97101d7bc1 core: dma: Delay DMA by 3 cycles
Former-commit-id: 06426b01a3e9e9084c97cd8f3a3de3b3c2b207e6
Former-commit-id: 2dee7bc2a2a3a3e69c7afa878f2d03208f330752
2020-10-17 06:36:02 -07:00
Michel Heily 0de8a60006 core: Start working on a scheduler
A more robust cycle aware event scheduling, to easily implement serial-io, dmg audio channels and improve accuracy.
This brings a slight performance hit :/

I also ran dos2unix on some of the files :D


Former-commit-id: 62f4ba33e3a083b7976d6512ba6f5720ec493aa0
Former-commit-id: a4b3a92cd1eb156bbe9fd0ef77fbb0e7a45660cb
2020-10-17 06:36:02 -07:00
Michel Heily b68c73819a Fix cfg_if dependency
Former-commit-id: 5b9f830edcda0fad9321a26f74a5e85ec1b7b104
Former-commit-id: dd77520fae5c74c92921779a20870da38b607924
2020-10-14 21:11:00 +03:00
Michel Heily dc7cd24e8d [perf] Refactor&Optimize inner core::arm7tdmi APIs.
Avoid passing ArmInstruction struct to handlers, as accesses to its fields can result in memory operations.


Former-commit-id: 6ea1719e36a0fefa1b30bdae4d6e8ab4dbf3af1a
Former-commit-id: e5855b8258f98d3f4c0819f3aec2fd0f47fef545
2020-10-10 11:08:26 -07:00
Michel Heily bf601404fa Optimize cartridge Bus reads
The `if let Some(gpio) = &self.gpio` causes a memory read of `self.gpio` for every Bus::read/write_16.
It is better to reverse the order since `is_gpio_access` does not generate and memory reads and thus less costly.


Former-commit-id: bcce7d9c3a2b159a7f6b291d7b08ccf9c4d0db14
Former-commit-id: 69c12db503c9e612faa7cd8a57f6d862694c8370
2020-10-10 11:08:26 -07:00
sapir 8dee829e26 Avoid repeated background index sort
Former-commit-id: 5c7aab3a416cc1cfd9cbd6033457b111fe409d98
Former-commit-id: 0594872c527f57bfd77d0afd9635eed3b88f9be8
2020-10-10 11:08:26 -07:00
sapir 9d08ac13e6 Move backdrop color read out of compose_pixel
Former-commit-id: 20d5d8a35b5e7fa0ca46bea297b1b554ba98948d
Former-commit-id: f50dbe6b529fef91f5cf5a0a808d93b878f2adff
2020-10-10 11:08:26 -07:00
Michel Heily 529c9752c4 fix: Ignore top 4 bits of DMA addresses
Former-commit-id: 3a5e691ca617803ef61f7a534c70d1cf04f36cb9
Former-commit-id: 289fad7340cbb18c51ecccd43e44682b37c78a1a
2020-10-03 21:58:32 +03:00
Michel Heily 1ab22f2b52 Fix access violation for DebugRead in Gpu
Former-commit-id: 25d2da276a50f662dafb4634c7b3fb4ebcf239f4
Former-commit-id: 4134896128ef3c7ddd8bbd2804d8d1edc46c7a6c
2020-10-03 21:58:32 +03:00
Michel Heily ba2eff82ac platform/android: Big re-write of native interface
Mainly convert mainloop and audio thread into native code for
performance increase. (Calling into JNI every frame was costy)

The code was cleaned up quite a bit, but I may have introduced new bugs
in this process :<


Former-commit-id: fdbc21b5ab39f3d2e36647fd1177dc9a84a16980
Former-commit-id: ac765dbee8c994e1b69cc694846511837c2685b9
2020-09-30 00:27:00 +03:00
Michel Heily 08a7cd966a core: add "no_video_interface" feature
Former-commit-id: 0b1462e3ef1ab65c37e2c0fce54bc7f5c2f9f2b5
Former-commit-id: 7b837be4dcb477b048f0118c4ab30f97eb445363
2020-09-30 00:10:47 +03:00
Michel Heily e25268f4d8 core: bump ringbuf to 0.2.2
Former-commit-id: a39789277cbc62b55ac4896a1dcee0a08eaa91c5
Former-commit-id: d9c94a5f42a11e59c816c1d756c5a2ea4e4dcad7
2020-09-30 00:09:54 +03:00
Michel Heily 554edd62b0 core: Properly set SharedInterruptFlags pointer for all interrupt generating devices when restoring state.
Serde doesn't like Rc that much :(

Fixes #142


Former-commit-id: e1e8a96b4867e351d103fb7d92d71b0434e8fc31
Former-commit-id: 28366bbb36b3e93b574f397b103a483844fd8131
2020-09-27 15:44:17 +03:00
Tibor Nagy 4050dcdf2f core: Add error handling to cartridge header parsing
Former-commit-id: 4e65ccd597bc082f259788f0870287254e852a2f
Former-commit-id: ebb62516936dc0f27dc9761aeb6bb6faa8ec58b5
2020-05-30 15:35:12 +03:00
Michel Heily 1b1b855702 core/gpu: Impl bitmap mode 5 and properly handle wraparound for bitmap modes.
resolves #90


Former-commit-id: 633580870e2d44d95a8b53b6311232f0fad48bd9
Former-commit-id: aa2ba32116900f635f12f9dcc9d29344367711eb
2020-05-30 14:32:03 +03:00
Michel Heily 90e492d81a core/sysbus: Get rid of memory_map! macro
While saving code re-use, it won't allow flexibility for special casing
specific size bus accesses which are much needed in order to emulate
open-bus and bios reads


Former-commit-id: 952a30a130612d61b3f5047b1f1c3cbda9bd58a8
Former-commit-id: ad3a25c012853399591d79f4f1a4423ea9e6645e
2020-05-30 13:44:37 +03:00
Michel Heily 24f6ad61c1 Add DebugRead trait
Former-commit-id: 4c9339dc0f2057152dcb6faccd78f058bc58676f
Former-commit-id: 7bf052ace6b5b12eca3c74f64f4d61d4ae6ac18e
2020-05-30 13:44:27 +03:00
Michel Heily b888fc0c95 Move BoxedMemory to core::util
Former-commit-id: 99a04859982f39f0062c781d9f61b2a55f8e5c10
Former-commit-id: 1ae7808c64116347410b52770edf132f3beec817
2020-05-30 13:44:00 +03:00
Michel Heily 6e39780b43 util: Add WeakPointer helper for passing around raw pointers
Former-commit-id: eaab1057cf7bf8132ba7b59f6c5315e873064c30
Former-commit-id: 94f947733463b528dd3775d2bc6f55adebc36a2d
2020-05-30 13:43:49 +03:00
Michel Heily 879374a9b0 Refactor dir rustboyadvance-core -> core
Former-commit-id: 5af970f6d56d321472f2b91885e41ca113390986
Former-commit-id: 748e222a36362eb5ac8909068c32f2d3f98ca536
2020-05-30 13:43:37 +03:00