Commit graph

12 commits

Author SHA1 Message Date
Michel Heily 451be2036f feat(logger): Replace various println! with logs
Former-commit-id: c2f38f863d65c4564f4d2169e63714a2925a4d3f
2020-01-31 16:15:29 +02:00
Michel Heily f4460b2740 feat/savestates: Implement save/load state API for GameBoyAdvance
Using serde & bincode encoding


Former-commit-id: f5e4c599497f6bdf3096fa99f8b2d6ce89278ef7
2020-01-16 20:18:32 +02:00
Michel Heily c6feb5d500 core: Optimizing GameBoyAdvance::frame
Profiling GameBoyAdvance::frame shows that it spends way too much time idleing
on SoundController::update & Gpu::step waiting for the cycle count to
reach to the next event, Consuming cpu time for the Arm7tdmi core.

This commit changes the implementation of the main loop functions so
that the CPU will run as many cycles as possible and the peripherals
will only be updated when needed.
The is a performance improvement of roughly 50% in fps in some games!


Former-commit-id: 937e097f958423934c70b7face6b6b02926b7a51
2020-01-11 16:12:54 +02:00
Michel Heily 71a4837d25 core: Reduce overhead in Bus interface
Former-commit-id: 1b3b00825d0b6aec0223445a1f00408397efca56
2020-01-11 16:12:05 +02:00
Michel Heily b00fbfb38c gpu: refactor: Big refactor preparations
1) Decouple SysBus from Gpu
2) Split Gpu rendering function into separate modules
3) Cleanup


Former-commit-id: 0435ad1c9c1de72ed50769fabfea7c5f33b670e0
2019-12-29 23:44:34 +02:00
Michel Heily c2ac3c5a10 Improve DMA code
Former-commit-id: 8fdb6195ceb323aebd8a26da98fe286d89ef8363
2019-12-27 12:37:32 +02:00
Michel Heily fefeddbc40 Continue working on DMA sound.
Cleanup timer.rs
run cargo fmt
restore debugging continue&frame commands
Fix bug introduced in previous commit causing the bios animation to
hang


Former-commit-id: 188acaa1121503a97f2d3be816f6f57835e17fe1
2019-12-23 01:37:45 +02:00
Michel Heily 70cb99161d Start working on DMA sound
Former-commit-id: 066210a86a7836b6ae1dfd5ce229d050cbe00ca4
2019-12-23 01:37:45 +02:00
Michel Heily ccfff31123 Improve DMA
According to GBATEK:
The SAD, DAD, and CNT_L registers are holding the initial start
addresses, and initial length. The hardware does NOT change the content
of these registers during or after the transfer.

The actual transfer takes place by using internal pointer/counter
registers. The initial values are copied into internal regs under the
following circumstances:

Upon DMA Enable (Bit 15) changing from 0 to 1: Reloads SAD, DAD, CNT_L.

Upon Repeat: Reloads CNT_L, and optionally DAD (Increment+Reload).


Former-commit-id: 1e606dc88603a4600a79a341ef17fe8ccb482871
2019-11-16 18:17:53 +02:00
Michel Heily c78a111ad4 Implement DMA, WIP
I have fought very hard against the rust ownership model,
In the end for DMA to play nice with my code, I had to resort to use
unsafe code for now..

The DMA implementation itself is not accurate to say the least, but will
have to do for now.

Tonc's dma_demo.gba plays but with a visual glitch.


Former-commit-id: 3b9cdcb2d09c78701290f2c48b77f9f3487e85c9
2019-11-09 19:44:55 +02:00
Michel Heily c7dd713605 The big ioregs refactoring.
This commit refactors the ioregs:
* Use bitfield crate to implement the GPU ioregs.
* IoRegs are stored in their own variables bindings (i.e, Gpu related ioregs are now fields of the Gpu struct)
  - This optimize performance quiet alot from my testings - since every scanline was accessing deseralizing ioregs from sysbus. (Getting constant 59fps now)
* For now, comment out DMA model

Also, cleaned the code up to eliminate rustc warnings.


Former-commit-id: 9077695c446ebd1a71783acfdd9819245aa02d7a
2019-08-03 00:24:15 +03:00
Michel Heily 53115a9a58 Refactor core functionality into a separate module
Former-commit-id: 5d55b9eb0b63ed7c61465b4e814782165caa5002
2019-07-20 16:46:00 +03:00
Renamed from src/dma.rs (Browse further)