Commit graph

8 commits

Author SHA1 Message Date
Michel Heily 554edd62b0 core: Properly set SharedInterruptFlags pointer for all interrupt generating devices when restoring state.
Serde doesn't like Rc that much :(

Fixes #142


Former-commit-id: e1e8a96b4867e351d103fb7d92d71b0434e8fc31
Former-commit-id: 28366bbb36b3e93b574f397b103a483844fd8131
2020-09-27 15:44:17 +03:00
Tibor Nagy 4050dcdf2f core: Add error handling to cartridge header parsing
Former-commit-id: 4e65ccd597bc082f259788f0870287254e852a2f
Former-commit-id: ebb62516936dc0f27dc9761aeb6bb6faa8ec58b5
2020-05-30 15:35:12 +03:00
Michel Heily 1b1b855702 core/gpu: Impl bitmap mode 5 and properly handle wraparound for bitmap modes.
resolves #90


Former-commit-id: 633580870e2d44d95a8b53b6311232f0fad48bd9
Former-commit-id: aa2ba32116900f635f12f9dcc9d29344367711eb
2020-05-30 14:32:03 +03:00
Michel Heily 90e492d81a core/sysbus: Get rid of memory_map! macro
While saving code re-use, it won't allow flexibility for special casing
specific size bus accesses which are much needed in order to emulate
open-bus and bios reads


Former-commit-id: 952a30a130612d61b3f5047b1f1c3cbda9bd58a8
Former-commit-id: ad3a25c012853399591d79f4f1a4423ea9e6645e
2020-05-30 13:44:37 +03:00
Michel Heily 24f6ad61c1 Add DebugRead trait
Former-commit-id: 4c9339dc0f2057152dcb6faccd78f058bc58676f
Former-commit-id: 7bf052ace6b5b12eca3c74f64f4d61d4ae6ac18e
2020-05-30 13:44:27 +03:00
Michel Heily b888fc0c95 Move BoxedMemory to core::util
Former-commit-id: 99a04859982f39f0062c781d9f61b2a55f8e5c10
Former-commit-id: 1ae7808c64116347410b52770edf132f3beec817
2020-05-30 13:44:00 +03:00
Michel Heily 6e39780b43 util: Add WeakPointer helper for passing around raw pointers
Former-commit-id: eaab1057cf7bf8132ba7b59f6c5315e873064c30
Former-commit-id: 94f947733463b528dd3775d2bc6f55adebc36a2d
2020-05-30 13:43:49 +03:00
Michel Heily 879374a9b0 Refactor dir rustboyadvance-core -> core
Former-commit-id: 5af970f6d56d321472f2b91885e41ca113390986
Former-commit-id: 748e222a36362eb5ac8909068c32f2d3f98ca536
2020-05-30 13:43:37 +03:00