Commit graph

15 commits

Author SHA1 Message Date
Michel Heily 21708a3d58 [perf] sysbus: Improve add_cycls()
Fulfill TODO from long ago, I used perf-record (--call-graph dwarf)  and detected that add_cycles() was hot enough,
I added 2 optimizations:
- Removed bound checks from array accesses
- Increase the LUT size to include dummy entries for open-bus to eliminate the if check

run_60_frames           time:   [183.65 ms 183.69 ms 183.73 ms]
                        change: [-9.4414% -9.2849% -9.1315%] (p = 0.00 < 0.05)
                        Performance has improved.


Former-commit-id: 1cbb596b856e604ad6c48eb0d47771e7cee44d1e
Former-commit-id: 9f15e35237f343d0c816fd9d51d81081736d9e17
2021-06-05 17:31:10 +03:00
Michel Heily fb32b9a671 core: Implement mGBA log support.
It's quite an handy way to log messages from ROMs, so I thought it'd be nice to add it.


Former-commit-id: 6869bdb58cfa883ac1ca6832f0bbeeab0edcf552
Former-commit-id: 89d7d826c7a906bbb68f9f4305bb92cd50bb2296
2020-10-24 05:59:48 -07:00
Michel Heily 6b8f4e8f51 core: Implement open bus (Reading from unused memory)
Former-commit-id: f0223556894a02ad1f85bb81abc18d47b7508445
Former-commit-id: e44b952867197467fa724022a05ba4579b1e2f03
2020-10-18 09:41:35 -07:00
Michel Heily fc7ad01cc0 Forgot to restore scheduler pointers when restoring savestate :)
Former-commit-id: c6968e6767f0aa996a908a1444ce63bafd8b427d
Former-commit-id: ce636212835f50745c7edeb32e1fed925850b7c8
2020-10-18 08:32:44 -07:00
Michel Heily b003dc950f core: Implement bios read protection when CPU is not executing from bios.
Fixes #109
Fixes #106
Fixes MegaMan email menu freezing and probably some more games


Former-commit-id: ed37520f2bc732b07334261dfe3d23cccf3fc04c
Former-commit-id: d7f206b0f405ffe09a3b36d90268f1d683a64cea
2020-10-18 06:59:06 -07:00
Michel Heily 1ca261e5c7 core: Get rid of that BoxedMemory nonsense
Just directly impl Bus trait for Box<[u8]>


Former-commit-id: 7b8a29972520afb7ff197708b9c2146b293a5f29
Former-commit-id: 0c528165ed899fad14b1e25995fdfe8ae004da2a
2020-10-17 16:58:52 -07:00
Michel Heily b6e2d55550 Everyday I'm ~~shuffeling~~ refactoring.
Some big refactors:
* improve scheduler performance by using a BinaryHeap
* refactor the scheduler API
* arm7tdmi
	* Change struct arm7tdmi::Core struct layout so frequently accesses fields would benefit from CPU cache
	* Simplify and cleanup cycle counting by implementing a MemoryInterface trait
	* Still not passing many cycle accuracy tests, but I believe it's because I don't have the prefetch buffer yet.
* Timer overflows are now scheduled
	* This fixes #111 and fixes #112
*


Former-commit-id: 17989e841a1ea88c2a7e14f4c99b31790a43c023
Former-commit-id: 109d98d824a464de347f6590a6ffe9af86b4b4ea
2020-10-17 06:36:02 -07:00
Michel Heily 85db28dac6 core: debuggger: load symbols from elf files
Former-commit-id: 3b20be6ecff9d540f7ba0c76d9762f87fac81998
Former-commit-id: 8b08fb90c5c163479c8318dd01f1f92fab475efc
2020-10-17 06:36:02 -07:00
Michel Heily 3fa858f969 core: bus: Change read_x methods of Bus trait to take &mut self
Former-commit-id: ee95b949585420e1daf95ea50939b1a8c9b77349
Former-commit-id: 651203037284fc46eb669cd0e40dc2ebd85bd96b
2020-10-17 06:36:02 -07:00
Michel Heily bce4456f42 [breaking-change] Remove game ROM and bios from savestate file.
This breaks the API of GameBoyAdvanvce::save_state and restore_state methods.
Currently as WIP only SDL2 frontend will adjust.


Former-commit-id: 1df15c8697fef0f6adddb07a6d653947c622ba12
Former-commit-id: 2ea339dc6a0d1e7539d167c4df29694b408303da
2020-10-17 06:36:02 -07:00
Michel Heily 90e492d81a core/sysbus: Get rid of memory_map! macro
While saving code re-use, it won't allow flexibility for special casing
specific size bus accesses which are much needed in order to emulate
open-bus and bios reads


Former-commit-id: 952a30a130612d61b3f5047b1f1c3cbda9bd58a8
Former-commit-id: ad3a25c012853399591d79f4f1a4423ea9e6645e
2020-05-30 13:44:37 +03:00
Michel Heily 24f6ad61c1 Add DebugRead trait
Former-commit-id: 4c9339dc0f2057152dcb6faccd78f058bc58676f
Former-commit-id: 7bf052ace6b5b12eca3c74f64f4d61d4ae6ac18e
2020-05-30 13:44:27 +03:00
Michel Heily b888fc0c95 Move BoxedMemory to core::util
Former-commit-id: 99a04859982f39f0062c781d9f61b2a55f8e5c10
Former-commit-id: 1ae7808c64116347410b52770edf132f3beec817
2020-05-30 13:44:00 +03:00
Michel Heily 6e39780b43 util: Add WeakPointer helper for passing around raw pointers
Former-commit-id: eaab1057cf7bf8132ba7b59f6c5315e873064c30
Former-commit-id: 94f947733463b528dd3775d2bc6f55adebc36a2d
2020-05-30 13:43:49 +03:00
Michel Heily 879374a9b0 Refactor dir rustboyadvance-core -> core
Former-commit-id: 5af970f6d56d321472f2b91885e41ca113390986
Former-commit-id: 748e222a36362eb5ac8909068c32f2d3f98ca536
2020-05-30 13:43:37 +03:00
Renamed from rustboyadvance-core/src/sysbus.rs (Browse further)