Michel Heily
90e492d81a
core/sysbus: Get rid of memory_map! macro
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While saving code re-use, it won't allow flexibility for special casing
specific size bus accesses which are much needed in order to emulate
open-bus and bios reads
Former-commit-id: 952a30a130612d61b3f5047b1f1c3cbda9bd58a8
Former-commit-id: ad3a25c012853399591d79f4f1a4423ea9e6645e
2020-05-30 13:44:37 +03:00
Michel Heily
24f6ad61c1
Add DebugRead trait
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Former-commit-id: 4c9339dc0f2057152dcb6faccd78f058bc58676f
Former-commit-id: 7bf052ace6b5b12eca3c74f64f4d61d4ae6ac18e
2020-05-30 13:44:27 +03:00
Michel Heily
b888fc0c95
Move BoxedMemory to core::util
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Former-commit-id: 99a04859982f39f0062c781d9f61b2a55f8e5c10
Former-commit-id: 1ae7808c64116347410b52770edf132f3beec817
2020-05-30 13:44:00 +03:00
Michel Heily
6e39780b43
util: Add WeakPointer helper for passing around raw pointers
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Former-commit-id: eaab1057cf7bf8132ba7b59f6c5315e873064c30
Former-commit-id: 94f947733463b528dd3775d2bc6f55adebc36a2d
2020-05-30 13:43:49 +03:00
Michel Heily
879374a9b0
Refactor dir rustboyadvance-core -> core
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Former-commit-id: 5af970f6d56d321472f2b91885e41ca113390986
Former-commit-id: 748e222a36362eb5ac8909068c32f2d3f98ca536
2020-05-30 13:43:37 +03:00
