5 commits

Author	SHA1	Message	Date
Michel Heily	97101d7bc1	core: dma: Delay DMA by 3 cycles ... Former-commit-id: 06426b01a3e9e9084c97cd8f3a3de3b3c2b207e6 Former-commit-id: 2dee7bc2a2a3a3e69c7afa878f2d03208f330752	2020-10-17 06:36:02 -07:00
Michel Heily	0de8a60006	core: Start working on a scheduler ... A more robust cycle aware event scheduling, to easily implement serial-io, dmg audio channels and improve accuracy. This brings a slight performance hit :/ I also ran dos2unix on some of the files :D Former-commit-id: 62f4ba33e3a083b7976d6512ba6f5720ec493aa0 Former-commit-id: a4b3a92cd1eb156bbe9fd0ef77fbb0e7a45660cb	2020-10-17 06:36:02 -07:00
Michel Heily	08a7cd966a	core: add "no_video_interface" feature ... Former-commit-id: 0b1462e3ef1ab65c37e2c0fce54bc7f5c2f9f2b5 Former-commit-id: 7b837be4dcb477b048f0118c4ab30f97eb445363	2020-09-30 00:10:47 +03:00
Michel Heily	554edd62b0	core: Properly set SharedInterruptFlags pointer for all interrupt generating devices when restoring state. ... Serde doesn't like Rc that much :( Fixes #142 Former-commit-id: e1e8a96b4867e351d103fb7d92d71b0434e8fc31 Former-commit-id: 28366bbb36b3e93b574f397b103a483844fd8131	2020-09-27 15:44:17 +03:00
Michel Heily	879374a9b0	Refactor dir rustboyadvance-core -> core ... Former-commit-id: 5af970f6d56d321472f2b91885e41ca113390986 Former-commit-id: 748e222a36362eb5ac8909068c32f2d3f98ca536	2020-05-30 13:43:37 +03:00

Renamed from rustboyadvance-core/src/gba.rs (Browse further)