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Author SHA1 Message Date
Michel Heily 04d2edfc01 Refactor "backend" concept 
See plat/sdl2


Former-commit-id: 5f7c9625467003d5b73307959095eb5365db523e
 2019-12-20 15:11:26 +02:00
Yonatan Goldschmidt 60c77869df Add cpal extern crate 
I really hope all these additions to Cargo.lock are actually its deps...


Former-commit-id: 7c85f330ea3c27f8ebae7020dc4a46d7d557affd
 2019-12-20 15:11:26 +02:00
Michel Heily c117cbe924 Make the debugger work again, but currently breakpoints are not supported. 
Added memory write command and the ability to pause the debugger with Ctrl-C


Former-commit-id: 83d141fa191dadefb84f7c9de163631a69af8324
 2019-11-12 18:22:00 +02:00
Michel Heily 3a1d5c10ce Fix many bugs, refactor many things.. 
Passing: Armwrestler, cpu_test by Dead_Body

Former-commit-id: 80d815d110c5341515dd01c476a0d7e25ecb66a8
 2019-11-09 01:06:24 +02:00
Michel Heily 7cc1a50d12 Support zip files and add --no-framerate-limit 
Former-commit-id: 62a7122fb0b3e832eeb3cbf347a0966e4cd32d50
 2019-09-11 21:26:40 +03:00
Michel Heily 639993edd7 Add blending and mosaic SFX, and cleanup code. 
Former-commit-id: b9f0ccaf1820da61f49ebeb2af5beff5cccd722f
 2019-08-13 22:15:36 +03:00
Michel Heily c7dd713605 The big ioregs refactoring. 
This commit refactors the ioregs:
* Use bitfield crate to implement the GPU ioregs.
* IoRegs are stored in their own variables bindings (i.e, Gpu related ioregs are now fields of the Gpu struct)
  - This optimize performance quiet alot from my testings - since every scanline was accessing deseralizing ioregs from sysbus. (Getting constant 59fps now)
* For now, comment out DMA model

Also, cleaned the code up to eliminate rustc warnings.


Former-commit-id: 9077695c446ebd1a71783acfdd9819245aa02d7a
 2019-08-03 00:24:15 +03:00
Michel Heily 7e9c0e31da Add minifb backend - Armwrestler now plays ! 
Former-commit-id: d72ea9139e04624322cf3bc4a8ab330f6bb133a4
 2019-07-20 23:02:18 +03:00
Michel Heily 1084be52b8 WIP mode0 rendering 
Former-commit-id: 6bce375f9373bbddf4522da5ecc2ea3584373847
 2019-07-15 19:23:16 +03:00
Michel Heily efb5d361d6 Add PaletteView command for the debugger. 
Former-commit-id: c4e0250eea700cfbcbb9f904cde7b6bc055d3e05
 2019-07-06 16:04:43 +03:00
Michel Heily cbddeffd91 arm: Implement MSR_REG and fix some prefetching errors 
Former-commit-id: 177b8966159ed86472b0d4d031363df72d46807a
 2019-07-02 16:53:29 +03:00
Michel Heily 967ccca8dd Mega commit - model CPU pipelining. 
I except many bugs to arise..


Former-commit-id: bcc6ea57af803f783b0dd548b50956b3ccda2b1a
 2019-06-29 22:23:12 +03:00
Michel Heily a70b92d5a4 Rename project 2019-06-27 13:15:46 +03:00
Michel Heily e5d93f689f Work.. 
Refactor disassembler to a struct.
Implement more commands;
 2019-06-27 13:15:34 +03:00
Michel Heily fc28d89097 Implement a few debugger commands 2019-06-27 13:15:34 +03:00
Michel Heily 107e34aca1 Start debugger repl 2019-06-27 13:15:34 +03:00
Michel Heily 9330c53957 Start modeling CPU 
Wrote a shallow skeleton of a CPU Core.
Finally made the disassembler a clap subcommand.
 2019-06-27 13:15:19 +03:00
Michel Heily addea1efa0 Merge both packages 2019-06-24 22:02:00 +03:00
Michel Heily 094cbb5f29 Refactor disassembler binary into arm7tdmi package 2019-06-24 21:45:25 +03:00
Michel Heily 377f350e12 Start arm disassembler 2019-06-24 16:36:20 +03:00
Michel Heily 8324c1ed50 Initial commit 2019-06-24 16:36:20 +03:00