Michel Heily
|
a70b92d5a4
|
Rename project
|
2019-06-27 13:15:46 +03:00 |
|
|
Michel Heily
|
fc400ace5f
|
Improve debug repl parsing :)
|
2019-06-27 13:15:46 +03:00 |
|
|
Michel Heily
|
e5d93f689f
|
Work..
Refactor disassembler to a struct.
Implement more commands;
|
2019-06-27 13:15:34 +03:00 |
|
|
Michel Heily
|
22a915ec85
|
Add continue command
|
2019-06-27 13:15:34 +03:00 |
|
|
Michel Heily
|
9921f1c974
|
Add info and reset commands
|
2019-06-27 13:15:34 +03:00 |
|
|
Michel Heily
|
fc28d89097
|
Implement a few debugger commands
|
2019-06-27 13:15:34 +03:00 |
|
|
Michel Heily
|
107e34aca1
|
Start debugger repl
|
2019-06-27 13:15:34 +03:00 |
|
|
Michel Heily
|
9330c53957
|
Start modeling CPU
Wrote a shallow skeleton of a CPU Core.
Finally made the disassembler a clap subcommand.
|
2019-06-27 13:15:19 +03:00 |
|
|
Michel Heily
|
addea1efa0
|
Merge both packages
|
2019-06-24 22:02:00 +03:00 |
|
|
Michel Heily
|
094cbb5f29
|
Refactor disassembler binary into arm7tdmi package
|
2019-06-24 21:45:25 +03:00 |
|
|
Michel Heily
|
5a5efae4c0
|
Refactor disassembler => disass
|
2019-06-24 20:53:56 +03:00 |
|
|
Michel Heily
|
dffb739d47
|
Finish disassembler for now
|
2019-06-24 20:20:08 +03:00 |
|
|
Michel Heily
|
377f350e12
|
Start arm disassembler
|
2019-06-24 16:36:20 +03:00 |
|
|
Michel Heily
|
f18ec05c17
|
Create .travis.yml
|
2019-06-24 16:36:20 +03:00 |
|
|
MishMish
|
4a67ecd1bc
|
Create LICENSE
|
2019-06-24 16:36:20 +03:00 |
|
|
Michel Heily
|
8324c1ed50
|
Initial commit
|
2019-06-24 16:36:20 +03:00 |
|