Commit graph

20 commits

Author SHA1 Message Date
Michel Heily b03fe3567e Fix all warnings during build
Ran cargo-fix to automatically fix most of the build warnings,
Cleaned up dead code, and fix the rest manually


Former-commit-id: f35faba46b40eaf9c047efb8ab1e77ffa24d41b6
2020-02-14 14:21:45 +02:00
Michel Heily 3fb75079a2 feat(eeprom): Fix eeprom emulation timeout problem, passing the nintendo eeprom tests
Former-commit-id: 5eea390de806d03eee8c043203ae4c57d7355caa
2020-01-31 16:15:29 +02:00
Michel Heily 451be2036f feat(logger): Replace various println! with logs
Former-commit-id: c2f38f863d65c4564f4d2169e63714a2925a4d3f
2020-01-31 16:15:29 +02:00
Michel Heily 51a79d68da feat(eeprom): Start working on Eeprom emulation
Former-commit-id: b600daa044e1bdf85fb022017517585a9aca4082
2020-01-29 20:46:22 +02:00
Michel Heily 23a6bf1637 feat(sram): Implement SRAM save type
Tested to work on Kirby.
Fixes #8


Former-commit-id: 90aa60b901a4ef790592c34c2350a7349939d612
2020-01-26 02:06:44 +02:00
Michel Heily f4460b2740 feat/savestates: Implement save/load state API for GameBoyAdvance
Using serde & bincode encoding


Former-commit-id: f5e4c599497f6bdf3096fa99f8b2d6ce89278ef7
2020-01-16 20:18:32 +02:00
Michel Heily 71a4837d25 core: Reduce overhead in Bus interface
Former-commit-id: 1b3b00825d0b6aec0223445a1f00408397efca56
2020-01-11 16:12:05 +02:00
Michel Heily 1de287713a core: sysbus: Boxed memory optimization
Former-commit-id: d845ceadcef463b2d66f5fb3cee2b6fbc752c286
2020-01-03 00:58:35 +02:00
Michel Heily b00fbfb38c gpu: refactor: Big refactor preparations
1) Decouple SysBus from Gpu
2) Split Gpu rendering function into separate modules
3) Cleanup


Former-commit-id: 0435ad1c9c1de72ed50769fabfea7c5f33b670e0
2019-12-29 23:44:34 +02:00
Michel Heily b026ad4ed3 Add simple resampling using cosine interpolation, seems to work~ish.
Still have clicks & delays in my audio output.


Former-commit-id: 46707fc773d8083fbba1ec614e3e0a3e53866b98
2019-12-23 01:37:45 +02:00
Michel Heily 4f2fbc2af2 More memory map bug fixes (Wrong ROM masks and more)
Former-commit-id: 4149a16965d111fb95629e8381269eae4f84c0c4
2019-11-16 18:17:53 +02:00
Michel Heily c78a111ad4 Implement DMA, WIP
I have fought very hard against the rust ownership model,
In the end for DMA to play nice with my code, I had to resort to use
unsafe code for now..

The DMA implementation itself is not accurate to say the least, but will
have to do for now.

Tonc's dma_demo.gba plays but with a visual glitch.


Former-commit-id: 3b9cdcb2d09c78701290f2c48b77f9f3487e85c9
2019-11-09 19:44:55 +02:00
Michel Heily 3a1d5c10ce Fix many bugs, refactor many things..
Passing: Armwrestler, cpu_test by Dead_Body

Former-commit-id: 80d815d110c5341515dd01c476a0d7e25ecb66a8
2019-11-09 01:06:24 +02:00
Michel Heily acd0e4f338 cpu: Refactor instructions to use explicit cycle counting.
The way cycles were counted up untill now was not accurate enough,
I've avoided doing so because the instruction implementation looks
bloated this way, but I've had problems with cycle accuracy with tonc's
timer demo.

This is not entirely correct though, and I'm 100% sure there are some
mistakes, but works good enough for now.


Former-commit-id: 748faaf99fe2f42925c0a2110192c6a01e5d27d4
2019-08-08 20:05:09 +03:00
Michel Heily d86cc87c79 Add WAITCNT, and refactor cycle calculation
Former-commit-id: e1ee5c9ce1f1db549fddd80907467da51e63b676
2019-08-07 09:50:33 +03:00
Michel Heily c72bbb96fd [WIP] Timers
Seems to work, but the cycle's are not accurate so they run slowly


Former-commit-id: a0b80acb4b68ed64caa535a0ec9f75a081d3aed4
2019-08-05 09:53:41 +03:00
Michel Heily c7dd713605 The big ioregs refactoring.
This commit refactors the ioregs:
* Use bitfield crate to implement the GPU ioregs.
* IoRegs are stored in their own variables bindings (i.e, Gpu related ioregs are now fields of the Gpu struct)
  - This optimize performance quiet alot from my testings - since every scanline was accessing deseralizing ioregs from sysbus. (Getting constant 59fps now)
* For now, comment out DMA model

Also, cleaned the code up to eliminate rustc warnings.


Former-commit-id: 9077695c446ebd1a71783acfdd9819245aa02d7a
2019-08-03 00:24:15 +03:00
Michel Heily 9f0df9af06 optimization: Optimize VRAM accesses from within the gpu.
Not going through the memory mapping anymore.

Also, this commit wraps the gpu pixeldata with a struct


Former-commit-id: d7b706d9de61bac7909e10d6bbe092968e6acc9f
2019-08-02 18:04:35 +03:00
Michel Heily e962150aaf Start working on Interrupts.
it kinda works now, but needs testing.


Former-commit-id: 8510314cce248a737d492d935cf5b48f86d920ed
2019-07-29 01:28:22 +03:00
Michel Heily 53115a9a58 Refactor core functionality into a separate module
Former-commit-id: 5d55b9eb0b63ed7c61465b4e814782165caa5002
2019-07-20 16:46:00 +03:00
Renamed from src/sysbus.rs (Browse further)