Commit graph

12 commits

Author SHA1 Message Date
Michel Heily 7e9c0e31da Add minifb backend - Armwrestler now plays !
Former-commit-id: d72ea9139e04624322cf3bc4a8ab330f6bb133a4
2019-07-20 23:02:18 +03:00
Michel Heily 1084be52b8 WIP mode0 rendering
Former-commit-id: 6bce375f9373bbddf4522da5ecc2ea3584373847
2019-07-15 19:23:16 +03:00
Michel Heily efb5d361d6 Add PaletteView command for the debugger.
Former-commit-id: c4e0250eea700cfbcbb9f904cde7b6bc055d3e05
2019-07-06 16:04:43 +03:00
Michel Heily cbddeffd91 arm: Implement MSR_REG and fix some prefetching errors
Former-commit-id: 177b8966159ed86472b0d4d031363df72d46807a
2019-07-02 16:53:29 +03:00
Michel Heily 967ccca8dd Mega commit - model CPU pipelining.
I except many bugs to arise..


Former-commit-id: bcc6ea57af803f783b0dd548b50956b3ccda2b1a
2019-06-29 22:23:12 +03:00
Michel Heily a70b92d5a4 Rename project 2019-06-27 13:15:46 +03:00
Michel Heily e5d93f689f Work..
Refactor disassembler to a struct.
Implement more commands;
2019-06-27 13:15:34 +03:00
Michel Heily fc28d89097 Implement a few debugger commands 2019-06-27 13:15:34 +03:00
Michel Heily 107e34aca1 Start debugger repl 2019-06-27 13:15:34 +03:00
Michel Heily 9330c53957 Start modeling CPU
Wrote a shallow skeleton of a CPU Core.
Finally made the disassembler a clap subcommand.
2019-06-27 13:15:19 +03:00
Michel Heily 377f350e12 Start arm disassembler 2019-06-24 16:36:20 +03:00
Michel Heily 8324c1ed50 Initial commit 2019-06-24 16:36:20 +03:00