2019-07-06 23:33:54 +01:00
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/// Struct containing everything
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///
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2019-07-06 13:53:36 +01:00
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use super::arm7tdmi::{Core, DecodedInstruction};
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use super::cartridge::Cartridge;
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2019-07-06 23:33:54 +01:00
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use super::dma::DmaChannel;
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use super::ioregs::consts::*;
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2019-07-06 13:53:36 +01:00
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use super::lcd::Lcd;
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use super::sysbus::SysBus;
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2019-07-06 23:33:54 +01:00
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2019-07-06 13:53:36 +01:00
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use super::{EmuIoDev, GBAResult};
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#[derive(Debug)]
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pub struct GameBoyAdvance {
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pub cpu: Core,
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pub sysbus: SysBus,
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// io devices
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2019-07-11 16:17:28 +01:00
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pub lcd: Lcd,
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pub dma0: DmaChannel,
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pub dma1: DmaChannel,
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pub dma2: DmaChannel,
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pub dma3: DmaChannel,
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2019-07-06 13:53:36 +01:00
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post_bool_flags: bool,
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}
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impl GameBoyAdvance {
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pub fn new(cpu: Core, bios_rom: Vec<u8>, gamepak: Cartridge) -> GameBoyAdvance {
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let sysbus = SysBus::new(bios_rom, gamepak);
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GameBoyAdvance {
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cpu: cpu,
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sysbus: sysbus,
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lcd: Lcd::new(),
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2019-07-06 23:33:54 +01:00
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dma0: DmaChannel::new(REG_DMA0SAD, REG_DMA0DAD, REG_DMA0DAD),
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dma1: DmaChannel::new(REG_DMA1SAD, REG_DMA1DAD, REG_DMA1DAD),
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dma2: DmaChannel::new(REG_DMA2SAD, REG_DMA2DAD, REG_DMA2DAD),
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dma3: DmaChannel::new(REG_DMA3SAD, REG_DMA3DAD, REG_DMA3DAD),
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2019-07-06 13:53:36 +01:00
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post_bool_flags: false,
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}
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}
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2019-07-11 16:17:28 +01:00
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fn run_cpu_for_n_cycles(&mut self, n: usize) {
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let previous_cycles = self.cpu.cycles;
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loop {
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self.cpu.step_one(&mut self.sysbus).unwrap();
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if n > self.cpu.cycles - previous_cycles {
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break;
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}
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}
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}
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pub fn frame(&mut self) {
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for _ in 0..Lcd::DISPLAY_HEIGHT {
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self.run_cpu_for_n_cycles(Lcd::CYCLES_HDRAW);
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let _irq = self.lcd.set_hblank(&mut self.sysbus);
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self.run_cpu_for_n_cycles(Lcd::CYCLES_HBLANK);
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}
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let _irq = self.lcd.set_vblank(&mut self.sysbus);
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self.run_cpu_for_n_cycles(Lcd::CYCLES_VBLANK);
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self.lcd.render(&mut self.sysbus); // Currently not implemented
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self.lcd.set_hdraw();
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}
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2019-07-06 13:53:36 +01:00
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pub fn step(&mut self) -> GBAResult<DecodedInstruction> {
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let previous_cycles = self.cpu.cycles;
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2019-07-11 16:17:28 +01:00
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let executed_insn = self.cpu.step_one(&mut self.sysbus)?;
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let mut cycles = self.cpu.cycles - previous_cycles;
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// // drop interrupts at the moment
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2019-07-06 23:33:54 +01:00
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2019-07-11 16:17:28 +01:00
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// let (dma_cycles, _) = self.dma0.step(cycles, &mut self.sysbus);
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// cycles += dma_cycles;
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2019-07-06 23:33:54 +01:00
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2019-07-11 16:17:28 +01:00
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// let (dma_cycles, _) = self.dma1.step(cycles, &mut self.sysbus);
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// cycles += dma_cycles;
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2019-07-06 23:33:54 +01:00
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2019-07-11 16:17:28 +01:00
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// let (dma_cycles, _) = self.dma2.step(cycles, &mut self.sysbus);
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// cycles += dma_cycles;
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2019-07-06 23:33:54 +01:00
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2019-07-11 16:17:28 +01:00
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// let (dma_cycles, _) = self.dma3.step(cycles, &mut self.sysbus);
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// cycles += dma_cycles;
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2019-07-06 13:53:36 +01:00
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2019-07-11 16:17:28 +01:00
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// let (lcd_cycles, _) = self.lcd.step(cycles, &mut self.sysbus);
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// cycles += lcd_cycles;
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2019-07-06 13:53:36 +01:00
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2019-07-11 16:17:28 +01:00
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Ok(executed_insn)
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2019-07-06 13:53:36 +01:00
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}
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}
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