cpu: Fix bug in psr mode bits
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@ -111,11 +111,11 @@ impl RegPSR {
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}
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pub fn mode(&self) -> CpuMode {
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CpuMode::from_u32(self.raw & 0xb11111).unwrap()
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CpuMode::from_u32(self.raw.bit_range(0..5)).unwrap()
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}
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pub fn set_mode(&mut self, mode: CpuMode) {
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self.raw |= mode as u32;
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self.raw.set_bit_range(0..5, (mode as u32) & 0b1_1111);
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}
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pub fn irq_disabled(&self) -> bool {
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