cpu: Fix bug in psr mode bits

2019-06-27 15:03:44 +03:00 · 2019-06-27 15:03:44 +03:00 · 1d766e95de
parent 948e0ccc25
commit 1d766e95de
1 changed files with 2 additions and 2 deletions
--- a/src/arm7tdmi/psr.rs
+++ b/src/arm7tdmi/psr.rs
@ -111,11 +111,11 @@ impl RegPSR {
    }

    pub fn mode(&self) -> CpuMode {
-        CpuMode::from_u32(self.raw & 0xb11111).unwrap()
+        CpuMode::from_u32(self.raw.bit_range(0..5)).unwrap()
    }

    pub fn set_mode(&mut self, mode: CpuMode) {
-        self.raw |= mode as u32;
+        self.raw.set_bit_range(0..5, (mode as u32) & 0b1_1111);
    }

    pub fn irq_disabled(&self) -> bool {