Add test for the bug fixed on e2a1303
Former-commit-id: 98d0789aaf92a549cbe1b387461fd9acd4d773c0
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@ -442,6 +442,8 @@ impl ArmInstruction {
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/// All instructions constants were generated using an ARM assembler.
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mod tests {
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use super::*;
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use crate::arm7tdmi::*;
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use crate::sysbus::BoxedMemory;
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#[test]
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fn test_decode_swi() {
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@ -523,4 +525,30 @@ mod tests {
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assert_eq!(format!("{}", decoded), "strteq\tr2, [r4], -r7, asr #8");
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}
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#[test]
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fn str_pre_index() {
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// str r4, [sp, 0x10]
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let decoded = ArmInstruction::decode(0xe58d4010, 0).unwrap();
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assert_eq!(decoded.fmt, ArmFormat::LDR_STR);
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assert_eq!(decoded.cond, ArmCond::Always);
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let mut core = Core::new();
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core.set_reg(4, 0x12345678);
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core.set_reg(REG_SP, 0);
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let bytes = vec![
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/* 0: */ 0xaa, 0xbb, 0xcc, 0xdd,
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/* 4: */ 0xaa, 0xbb, 0xcc, 0xdd,
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/* 8: */ 0xaa, 0xbb, 0xcc, 0xdd,
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/* c: */ 0xaa, 0xbb, 0xcc, 0xdd,
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/* 10: */ 0xaa, 0xbb, 0xcc, 0xdd,
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];
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let mut mem = BoxedMemory::new(bytes.into_boxed_slice());
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assert_ne!(mem.read_32(core.get_reg(REG_SP) + 0x10), 0x12345678);
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assert_eq!(core.exec_arm(&mut mem, decoded), Ok(CpuPipelineAction::IncPC));
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assert_eq!(mem.read_32(core.get_reg(REG_SP) + 0x10), 0x12345678);
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}
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}
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