Minor fixes

Fix LSR integer underflow.
Change SWI LR calculation


Former-commit-id: 6a298719e380c3a01f70c3b05d9f3507638398d5
This commit is contained in:
Michel Heily 2019-11-20 05:04:54 +02:00
parent 3c3e8c35b4
commit 3c3129c73c
4 changed files with 3 additions and 4 deletions

View file

@ -129,7 +129,7 @@ impl Core {
self.bs_carry_out = val.bit(31); self.bs_carry_out = val.bit(31);
0 0
} }
x if x < 32 => { 1..=31 => {
self.bs_carry_out = val >> (amount - 1) & 1 == 1; self.bs_carry_out = val >> (amount - 1) & 1 == 1;
(val as u32) >> amount (val as u32) >> amount
} }

View file

@ -20,7 +20,7 @@ impl Core {
ArmFormat::B_BL => self.exec_b_bl(bus, insn), ArmFormat::B_BL => self.exec_b_bl(bus, insn),
ArmFormat::DP => self.exec_data_processing(bus, insn), ArmFormat::DP => self.exec_data_processing(bus, insn),
ArmFormat::SWI => { ArmFormat::SWI => {
self.software_interrupt(bus, insn.pc + 4, insn.swi_comment()); self.software_interrupt(bus, self.pc - 4, insn.swi_comment());
Ok(()) Ok(())
} }
ArmFormat::LDR_STR => self.exec_ldr_str(bus, insn), ArmFormat::LDR_STR => self.exec_ldr_str(bus, insn),

View file

@ -456,7 +456,6 @@ impl Core {
self.gpr_banked_r13[5] = 0x0300_7f00; // UND self.gpr_banked_r13[5] = 0x0300_7f00; // UND
self.gpr[13] = 0x0300_7f00; self.gpr[13] = 0x0300_7f00;
self.gpr[14] = 0x0800_0000;
self.pc = 0x0800_0000; self.pc = 0x0800_0000;
self.cpsr.set(0x5f); self.cpsr.set(0x5f);

View file

@ -563,7 +563,7 @@ impl Core {
ThumbFormat::LdmStm => self.exec_thumb_ldm_stm(bus, insn), ThumbFormat::LdmStm => self.exec_thumb_ldm_stm(bus, insn),
ThumbFormat::BranchConditional => self.exec_thumb_branch_with_cond(bus, insn), ThumbFormat::BranchConditional => self.exec_thumb_branch_with_cond(bus, insn),
ThumbFormat::Swi => { ThumbFormat::Swi => {
self.software_interrupt(bus, insn.pc + 2, (insn.raw & 0xff) as u32); self.software_interrupt(bus, self.pc - 2, (insn.raw & 0xff) as u32);
Ok(()) Ok(())
} }
ThumbFormat::Branch => self.exec_thumb_branch(bus, insn), ThumbFormat::Branch => self.exec_thumb_branch(bus, insn),