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Fix gba-suite arm test #207

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Arm Data-Processing instruction was not initializign
`self.bs_carry_out` before activating the barrel-shifter.

Current ARM7 is too much spaghetti for me to handle anymore, maybe time
for some refactoring.


Former-commit-id: b21fe75496ccd89611fc56f5f00e885532c5ff20
Former-commit-id: 5b11f640d306ebc2afb95d76a3dd3e1530a87c36
This commit is contained in:
Michel Heily 2020-05-15 16:08:56 +03:00 committed by MishMish
parent fe9feb3498
commit 4e6735bb5c
2 changed files with 6 additions and 2 deletions
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3
rustboyadvance-core/src/arm7tdmi/alu.rs
View file

@ -223,6 +223,9 @@ impl Core {
carry_in: bool, carry_in: bool,
immediate: bool, immediate: bool,
) -> u32 { ) -> u32 {
// TODO get rid of Core::bs_carry_out field in favour sending the carry as a &mut reference,
// Forcing calling functions to do something with the carry :
self.bs_carry_out = carry_in;
// //
// From GBATEK: // From GBATEK:
// Zero Shift Amount (Shift Register by Immediate, with Immediate=0) // Zero Shift Amount (Shift Register by Immediate, with Immediate=0)

5
rustboyadvance-core/src/arm7tdmi/arm/exec.rs
View file

@ -193,19 +193,20 @@ impl Core {
let rn = raw_insn.bit_range(16..20) as usize; let rn = raw_insn.bit_range(16..20) as usize;
let rd = raw_insn.bit_range(12..16) as usize; let rd = raw_insn.bit_range(12..16) as usize;
let mut op1 = if rn == REG_PC { let mut op1 = if rn == REG_PC {
insn.pc + 8 insn.pc + 8
} else { } else {
self.get_reg(rn) self.get_reg(rn)
}; };
let mut s_flag = insn.set_cond_flag(); let mut s_flag = insn.set_cond_flag();
let opcode = insn.opcode(); let opcode = insn.opcode();
let op2 = if raw_insn.bit(25) { let op2 = if raw_insn.bit(25) {
let immediate = raw_insn & 0xff; let immediate = raw_insn & 0xff;
let rotate = 2 * raw_insn.bit_range(8..12); let rotate = 2 * raw_insn.bit_range(8..12);
// TODO refactor out
let bs_carry_in = self.cpsr.C();
self.bs_carry_out = bs_carry_in;
self.ror(immediate, rotate, self.cpsr.C(), false, true) self.ror(immediate, rotate, self.cpsr.C(), false, true)
} else { } else {
let reg = raw_insn & 0xf; let reg = raw_insn & 0xf;