Fix arm mode STR insn
Former-commit-id: 80903a9054e9b0dac07a5e2bb3cff7b0e722d438
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@ -348,7 +348,7 @@ impl Core {
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}
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}
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} else {
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} else {
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self.add_cycles(addr, sysbus, NonSeq + MemoryAccess32);
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self.add_cycles(addr, sysbus, NonSeq + MemoryAccess32);
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let value = self.get_reg(insn.rn());
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let value = self.get_reg(insn.rd());
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if insn.transfer_size() == 1 {
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if insn.transfer_size() == 1 {
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// +1N
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// +1N
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self.add_cycles(dest, sysbus, NonSeq + MemoryAccess8);
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self.add_cycles(dest, sysbus, NonSeq + MemoryAccess8);
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