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Impl Thumb Format 1 untested

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Former-commit-id: e80617fd415ba951310a42c79b6ca37251d0e250
This commit is contained in:
Michel Heily 2019-07-05 14:09:04 +03:00
parent 058760d7e4
commit fb0d3acb14
2 changed files with 20 additions and 6 deletions
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7
src/arm7tdmi/arm/exec.rs
View file

@ -91,7 +91,7 @@ impl Core {
}
}
fn register_shift(&mut self, reg: usize, shift: ArmRegisterShift) -> CpuResult<i32> {
pub fn register_shift(&mut self, reg: usize, shift: ArmRegisterShift) -> CpuResult<i32> {
let val = self.get_reg(reg) as i32;
match shift {
ArmRegisterShift::ShiftAmount(amount, shift) => {
@ -264,10 +264,8 @@ impl Core {
if insn.load_flag() {
let data = if insn.transfer_size() == 1 {
// +1N
self.load_8(addr, bus) as u32
} else {
// +1N
self.load_32(addr, bus)
};
@ -275,7 +273,7 @@ impl Core {
// +1I
self.add_cycle();
// +y
if insn.rd() == REG_PC {
pipeline_action = CpuPipelineAction::Flush;
}
@ -284,7 +282,6 @@ impl Core {
if insn.transfer_size() == 1 {
self.store_8(addr, value as u8, bus);
} else {
// +1N
self.store_32(addr, value, bus);
};
}

19
src/arm7tdmi/thumb/exec.rs
View file

@ -17,6 +17,22 @@ fn pop(cpu: &mut Core, bus: &mut Bus, r: usize) {
}
impl Core {
fn exec_thumb_move_shifted_reg(
&mut self,
bus: &mut Bus,
insn: ThumbInstruction,
) -> CpuExecResult {
let result = self
.register_shift(
insn.rs(),
ArmRegisterShift::ShiftAmount(insn.offset5() as u8 as u32, insn.format1_op()),
)
.unwrap();
self.gpr[insn.rd()] = result as u32;
Ok(CpuPipelineAction::IncPC)
}
fn exec_thumb_add_sub(&mut self, bus: &mut Bus, insn: ThumbInstruction) -> CpuExecResult {
let op1 = self.get_reg(insn.rs()) as i32;
let op2 = if insn.is_immediate_operand() {
@ -222,6 +238,7 @@ impl Core {
pub fn exec_thumb(&mut self, bus: &mut Bus, insn: ThumbInstruction) -> CpuExecResult {
match insn.fmt {
ThumbFormat::MoveShiftedReg => self.exec_thumb_move_shifted_reg(bus, insn),
ThumbFormat::AddSub => self.exec_thumb_add_sub(bus, insn),
ThumbFormat::DataProcessImm => self.exec_thumb_data_process_imm(bus, insn),
ThumbFormat::Mul => self.exec_thumb_mul(bus, insn),
@ -233,7 +250,7 @@ impl Core {
ThumbFormat::AddSp => self.exec_thumb_add_sp(bus, insn),
ThumbFormat::PushPop => self.exec_thumb_push_pop(bus, insn),
ThumbFormat::BranchConditional => self.exec_thumb_branch_with_cond(bus, insn),
_ => unimplemented!("thumb not implemented {:#?}", insn),
_ => unimplemented!("thumb not implemented {:#x?}", insn),
}
}
}