Commit graph

7 commits

Author SHA1 Message Date
Michel Heily
0665ff7451 WIP 2 SingleDataTransfer
Former-commit-id: 8a103161f34eb1a6c731c63ae65ca1056117ec55
Former-commit-id: 74c8158e7354253f6bd4ad50488d34de34e3ad70
2021-07-03 22:29:55 +03:00
Michel Heily
b3c3c70bce WIP const generics
Former-commit-id: 2c38215fb57de66bfce26cfa7e61c460bd2954ac
Former-commit-id: 8fe5cc4fdc58b1155590dbfd6546b280fcdcc259
2021-07-03 22:29:55 +03:00
Michel Heily
626c5fa805 core: arm7tdmi: Fix new bug in LDR/STR introduced in b603904.
Of course only arm-wrestler caught it while mgba suite/eggvance did not :(


Former-commit-id: a5dcaa9b40c8a5a5d5fb1e531a601361869a041f
Former-commit-id: eb8d30a3c1cf9c39425b29e6d8386ac2b68a424b
2021-06-09 02:01:47 +03:00
Michel Heily
20506091cc [perf] arm: Improve performance with barrel shifter.
Instead of using a struct member to hold the last barrel shifter carry output, which is expansive as it needs to be saved/loaded from memory, I now pass the carry around as an INOUT parameter.
Using perf anotate really shows high perctile of samples being spent on reading/writing `self.bs_carry_out`

Since this is a rather "surgical" changeset, I have made sure to run it against eggvance test suite, mGBA test suite and some games as well.

I actually saw better improvements than what the benchmark measured, but 7% is decent enough :)

```
run_60_frames           time:   [180.18 ms 180.45 ms 180.77 ms]
                        change: [-7.2464% -6.9081% -6.6324%] (p = 0.00 < 0.05)
                        Performance has improved.
```


Former-commit-id: 7cd7105a07aa0b78cab9dc8bbae3682b02b7ab7c
Former-commit-id: c68514beb3fa6c34f5f65544acbead21e527dbb0
2021-06-05 18:54:46 +03:00
Michel Heily
b6e2d55550 Everyday I'm ~~shuffeling~~ refactoring.
Some big refactors:
* improve scheduler performance by using a BinaryHeap
* refactor the scheduler API
* arm7tdmi
	* Change struct arm7tdmi::Core struct layout so frequently accesses fields would benefit from CPU cache
	* Simplify and cleanup cycle counting by implementing a MemoryInterface trait
	* Still not passing many cycle accuracy tests, but I believe it's because I don't have the prefetch buffer yet.
* Timer overflows are now scheduled
	* This fixes #111 and fixes #112
*


Former-commit-id: 17989e841a1ea88c2a7e14f4c99b31790a43c023
Former-commit-id: 109d98d824a464de347f6590a6ffe9af86b4b4ea
2020-10-17 06:36:02 -07:00
Michel Heily
dc7cd24e8d [perf] Refactor&Optimize inner core::arm7tdmi APIs.
Avoid passing ArmInstruction struct to handlers, as accesses to its fields can result in memory operations.


Former-commit-id: 6ea1719e36a0fefa1b30bdae4d6e8ab4dbf3af1a
Former-commit-id: e5855b8258f98d3f4c0819f3aec2fd0f47fef545
2020-10-10 11:08:26 -07:00
Michel Heily
879374a9b0 Refactor dir rustboyadvance-core -> core
Former-commit-id: 5af970f6d56d321472f2b91885e41ca113390986
Former-commit-id: 748e222a36362eb5ac8909068c32f2d3f98ca536
2020-05-30 13:43:37 +03:00
Renamed from rustboyadvance-core/src/arm7tdmi/arm/exec.rs (Browse further)