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7 commits

Author SHA1 Message Date
Michel Heily
b00fbfb38c gpu: refactor: Big refactor preparations
1) Decouple SysBus from Gpu
2) Split Gpu rendering function into separate modules
3) Cleanup


Former-commit-id: 0435ad1c9c1de72ed50769fabfea7c5f33b670e0
2019-12-29 23:44:34 +02:00
Michel Heily
04d2edfc01 Refactor "backend" concept
See plat/sdl2


Former-commit-id: 5f7c9625467003d5b73307959095eb5365db523e
2019-12-20 15:11:26 +02:00
Michel Heily
326bb06e82 Move rom file loading logic to Cartridge
Former-commit-id: 29045310d380657819529333b5231a98be5fa8c1
2019-12-20 15:11:26 +02:00
Michel Heily
7cc1a50d12 Support zip files and add --no-framerate-limit
Former-commit-id: 62a7122fb0b3e832eeb3cbf347a0966e4cd32d50
2019-09-11 21:26:40 +03:00
Michel Heily
d86cc87c79 Add WAITCNT, and refactor cycle calculation
Former-commit-id: e1ee5c9ce1f1db549fddd80907467da51e63b676
2019-08-07 09:50:33 +03:00
Michel Heily
c7dd713605 The big ioregs refactoring.
This commit refactors the ioregs:
* Use bitfield crate to implement the GPU ioregs.
* IoRegs are stored in their own variables bindings (i.e, Gpu related ioregs are now fields of the Gpu struct)
  - This optimize performance quiet alot from my testings - since every scanline was accessing deseralizing ioregs from sysbus. (Getting constant 59fps now)
* For now, comment out DMA model

Also, cleaned the code up to eliminate rustc warnings.


Former-commit-id: 9077695c446ebd1a71783acfdd9819245aa02d7a
2019-08-03 00:24:15 +03:00
Michel Heily
53115a9a58 Refactor core functionality into a separate module
Former-commit-id: 5d55b9eb0b63ed7c61465b4e814782165caa5002
2019-07-20 16:46:00 +03:00
Renamed from src/cartridge.rs (Browse further)