This module is written purely and always breaks when changes are being
made into the 'core' module, so as long as I don't use it, I don't feel
like maintaining it.
Former-commit-id: f5b18ba54a27d22e8a195dd0912ec9c8f29fa830
Cleanup timer.rs
run cargo fmt
restore debugging continue&frame commands
Fix bug introduced in previous commit causing the bios animation to
hang
Former-commit-id: 188acaa1121503a97f2d3be816f6f57835e17fe1
Fix tons of bug and reimplemented some of the core code.
Add a neat feature for debug builds:
When the cpu "swi 0x55" instruction, a breakpoint is triggered on the
host.
Former-commit-id: 959249df4374327d90b2503d7a45f8d5d27995a6
This commit refactors the ioregs:
* Use bitfield crate to implement the GPU ioregs.
* IoRegs are stored in their own variables bindings (i.e, Gpu related ioregs are now fields of the Gpu struct)
- This optimize performance quiet alot from my testings - since every scanline was accessing deseralizing ioregs from sysbus. (Getting constant 59fps now)
* For now, comment out DMA model
Also, cleaned the code up to eliminate rustc warnings.
Former-commit-id: 9077695c446ebd1a71783acfdd9819245aa02d7a
Pipeline code was unreadable up until now, this also fixes a bug:
* Some roms have illegal instructions right after branch instructions, and
the cpu would error trying to decode them because of pipelining.
Former-commit-id: e3201c7b0d2adfc772231a3e2d5909f43c17b50f
