Commit graph

23 commits

Author SHA1 Message Date
Michel Heily
53115a9a58 Refactor core functionality into a separate module
Former-commit-id: 5d55b9eb0b63ed7c61465b4e814782165caa5002
2019-07-20 16:46:00 +03:00
Michel Heily
0f73abaf98 Optimize instructions with "register lists" (LDM_STM)
These instruction (probably) allocated a vector each time.


Former-commit-id: 66f724e21e1e5d667d19c1f21d2cc4fa3944faac
2019-07-20 16:07:19 +03:00
Michel Heily
7119ba2451 Cpu: Rewrite pipeline code.
Pipeline code was unreadable up until now, this also fixes a bug:

* Some roms have illegal instructions right after branch instructions, and
the cpu would error trying to decode them because of pipelining.


Former-commit-id: e3201c7b0d2adfc772231a3e2d5909f43c17b50f
2019-07-20 16:03:37 +03:00
Michel Heily
95f45e55a9 arm: Impl MULL_MLAL and fix writeback for post-index memory transfers
Also some minor fixes and formatting


Former-commit-id: 4929b28cbb4eeeed5acfbdcdd19392ffa3bb0f37
2019-07-11 18:10:58 +03:00
Michel Heily
92f65794d8 Fix writeback for Thumb LdmStm
Former-commit-id: 00a15dc99716290da7b260b261090454d621ce8a
2019-07-09 02:20:32 +03:00
Michel Heily
65de0c4e9d Thumb 4 - Take care of "neg" case.
I overlooked it :/


Former-commit-id: 360eb755bcf343cddd98807e9faeff007c94cf64
2019-07-09 01:30:24 +03:00
Michel Heily
f7b2b48e5d Refactor ALU code into its own module, and fix things.
* Fix overflow flag being ignored
* Fix barrel shifter misimplementations
* Rustfmt fixes


Former-commit-id: a14d50372f7850a04b204accf4e5d8b924e4b48e
2019-07-08 20:57:58 +03:00
Michel Heily
ecdd6e0ed4 thumb: Fix ALU ops for barrel shifter opcodes
I kinda missed these when I read the manual ><


Former-commit-id: 7d6c21b6c3b46bf065a177c1c7f7a7a1baa6b8fa
2019-07-08 01:47:41 +03:00
Michel Heily
7e7d2c5208 thumb: Fix misimplementation of THUMB 12 :(
And this kids, is why you don't ever assume what an instruction does
without reading the manual.
Also, I called the ThumbFormat enum variant "LdrAddress", so I went
ahead and implemented as an ldr_str :/


Former-commit-id: f13833d16fba07565a0aba9d247d9754dbfc3d39
2019-07-08 00:49:03 +03:00
Michel Heily
c2685c14d7 Impl more thumb, Fix more things, the usual
Former-commit-id: 02f1898bfd8dd50519f103bb367e358fc55c46e7
2019-07-06 23:38:08 +03:00
Michel Heily
36dba78c55 More fixes
Former-commit-id: 897cbc0fb9c12469606c48ee8a02d35bf82c2ae5
2019-07-06 18:48:22 +03:00
Michel Heily
d1ef35646f Impl Thumb LdrStrImmOffset
Former-commit-id: 17d6f4ae1cb5f68b9fccf35536a6346e88326e77
2019-07-06 15:51:58 +03:00
Michel Heily
600bebc9d2 Partially Impl Arm LDM_STM (give me a break)
Manually testing seems to work, too lazy to write any tests now,
Will do it after all instructions are complete, buggy or not.


Former-commit-id: 0f36c81d6451c706408dd3c4815bfb3abea1ff44
2019-07-05 18:39:10 +03:00
Michel Heily
74329c2a0b Never leave unfinished work..
Former-commit-id: 91acecdaf3ec7f9de892bd9f712e3cf521e08beb
2019-07-05 16:10:21 +03:00
Michel Heily
d4b6952411 Impl Thumb 19, fix warnings and rustfmt
Former-commit-id: 8690aa25b1aa343b344776716b6213596bd1459a
2019-07-05 15:34:52 +03:00
Michel Heily
058760d7e4 Impl thumb Format4
Former-commit-id: 7b8705ee7b76bbeb5b2a21e830d16db06ce8d63c
2019-07-05 13:58:26 +03:00
Michel Heily
be9499c76d Move cycle counting to CPU Core
This isn't accurate, I'm probably missing something but at least it'll
make the instruction implementation more clean for now..


Former-commit-id: de24b15e1a51e1998207e5ea96fc8543f2553a26
2019-07-05 13:08:07 +03:00
Michel Heily
f8ebe26e5e Implement thumb format 13
(NOT TESTED)


Former-commit-id: 160ee3a6c09a12cab53f69c94b385ea17666bd5f
2019-07-05 03:46:04 +03:00
Michel Heily
5df9b6f317 Add thumb push-pop.
Not tested, cycle modeling is crap


Former-commit-id: a5092dab79a1a660fc6c96a71f0908cc2054be27
2019-07-05 03:28:02 +03:00
Michel Heily
702a08e30c Add many thumb instructions..
TODO add more tests for all the instructions I've got implemented so
far.
Also, I need to rewrite the whole "sysbus" module again because it's
crap and I keep refactoring it as I go.
I've added the "Dummy" because the bios for some reason tries to memzero
an unmapped region on the work ram (the thumb loop that ends at 0x126)


Former-commit-id: 67befd0935ee10df9ac8ceeaebd14f69767a7f16
2019-07-04 01:56:50 +03:00
Michel Heily
eaf972de93 Implement thumb format 6 (PC-Relative Load) and test it.
Former-commit-id: ae161edb0c8968913d2ef72a14053c118c6f7692
2019-07-03 02:15:16 +03:00
Michel Heily
b82874809f Implement thumb format3 instruction and add a test for it.
Former-commit-id: 8cf6664027dc3d5dbeb6d2ca3d089820baac2709
2019-07-03 01:26:48 +03:00
Michel Heily
6f81c236a6 Mega Commit #2 - Add some thumb decoding and disassembly
Former-commit-id: e3a89ac681a8d6f6f0bee85b32f64d181e11242f
2019-07-03 00:03:35 +03:00