Michel Heily
44c9e2c875
core: dma: Count cycles passed in DMA transfers
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Former-commit-id: 751f2e42f9c5c19f2fcc901754950d1e3797303b
Former-commit-id: 30d31be99daec4324532d4663390945a55f641b1
2020-10-17 06:36:02 -07:00
Michel Heily
97101d7bc1
core: dma: Delay DMA by 3 cycles
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Former-commit-id: 06426b01a3e9e9084c97cd8f3a3de3b3c2b207e6
Former-commit-id: 2dee7bc2a2a3a3e69c7afa878f2d03208f330752
2020-10-17 06:36:02 -07:00
Michel Heily
529c9752c4
fix: Ignore top 4 bits of DMA addresses
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Former-commit-id: 3a5e691ca617803ef61f7a534c70d1cf04f36cb9
Former-commit-id: 289fad7340cbb18c51ecccd43e44682b37c78a1a
2020-10-03 21:58:32 +03:00
Michel Heily
554edd62b0
core: Properly set SharedInterruptFlags pointer for all interrupt generating devices when restoring state.
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Serde doesn't like Rc that much :(
Fixes #142
Former-commit-id: e1e8a96b4867e351d103fb7d92d71b0434e8fc31
Former-commit-id: 28366bbb36b3e93b574f397b103a483844fd8131
2020-09-27 15:44:17 +03:00
Michel Heily
879374a9b0
Refactor dir rustboyadvance-core -> core
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Former-commit-id: 5af970f6d56d321472f2b91885e41ca113390986
Former-commit-id: 748e222a36362eb5ac8909068c32f2d3f98ca536
2020-05-30 13:43:37 +03:00
