3 commits

Author	SHA1	Message	Date
Michel Heily	d86cc87c79	Add WAITCNT, and refactor cycle calculation ... Former-commit-id: e1ee5c9ce1f1db549fddd80907467da51e63b676	2019-08-07 09:50:33 +03:00
Michel Heily	c7dd713605	The big ioregs refactoring. ... This commit refactors the ioregs: * Use bitfield crate to implement the GPU ioregs. * IoRegs are stored in their own variables bindings (i.e, Gpu related ioregs are now fields of the Gpu struct) - This optimize performance quiet alot from my testings - since every scanline was accessing deseralizing ioregs from sysbus. (Getting constant 59fps now) * For now, comment out DMA model Also, cleaned the code up to eliminate rustc warnings. Former-commit-id: 9077695c446ebd1a71783acfdd9819245aa02d7a	2019-08-03 00:24:15 +03:00
Michel Heily	53115a9a58	Refactor core functionality into a separate module ... Former-commit-id: 5d55b9eb0b63ed7c61465b4e814782165caa5002	2019-07-20 16:46:00 +03:00

Renamed from src/cartridge.rs (Browse further)