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optimize/arm: Improve arm instruction condition check.

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Obviously AL(always) instructions are the most common, so prioritize checking these first.


Former-commit-id: e236f1e116dbf65757a68dda9090645d220a1cee
This commit is contained in:
Michel Heily 2020-03-28 15:42:31 +03:00 committed by MishMish
parent 414c1b0557
commit d9ce1c7d8d
1 changed files with 6 additions and 3 deletions
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3
src/core/arm7tdmi/arm/exec.rs
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@ -1,6 +1,7 @@
use crate::bit::BitIndex; use crate::bit::BitIndex;
use super::super::alu::*; use super::super::alu::*;
use super::ArmCond;
use crate::core::arm7tdmi::psr::RegPSR; use crate::core::arm7tdmi::psr::RegPSR;
use crate::core::arm7tdmi::CpuAction; use crate::core::arm7tdmi::CpuAction;
use crate::core::arm7tdmi::{Addr, Core, CpuMode, CpuState, REG_LR, REG_PC}; use crate::core::arm7tdmi::{Addr, Core, CpuMode, CpuState, REG_LR, REG_PC};
@ -11,10 +12,12 @@ use super::*;
impl Core { impl Core {
pub fn exec_arm(&mut self, bus: &mut SysBus, insn: ArmInstruction) -> CpuAction { pub fn exec_arm(&mut self, bus: &mut SysBus, insn: ArmInstruction) -> CpuAction {
if insn.cond != ArmCond::AL {
if !self.check_arm_cond(insn.cond) { if !self.check_arm_cond(insn.cond) {
self.S_cycle32(bus, self.pc); self.S_cycle32(bus, self.pc);
return CpuAction::AdvancePC; return CpuAction::AdvancePC;
} }
}
match insn.fmt { match insn.fmt {
ArmFormat::BX => self.exec_bx(bus, insn), ArmFormat::BX => self.exec_bx(bus, insn),
ArmFormat::B_BL => self.exec_b_bl(bus, insn), ArmFormat::B_BL => self.exec_b_bl(bus, insn),