Commit graph

26 commits

Author SHA1 Message Date
Michel Heily
47032ec8b9 arm: Forgot this one :)
Former-commit-id: 7e6dfc766fd4b3872bffa08cfa2276d7517ba048
Former-commit-id: 4001761f719b98ed98d652ee00275dd1d8f7d232
2021-07-04 00:36:21 +03:00
Michel Heily
76d9102231 arm: remove old code
Former-commit-id: 906a5b902726c000fcdc1a01443c6662da72b2c9
Former-commit-id: ab2dac2ae2c066758645026b6484cd1a9355831a
2021-07-03 22:29:55 +03:00
Michel Heily
a7cc770be8 arm: finish converting all instructions to const-generics
Former-commit-id: 4557ecffb89d563357f5bd769515254533a404ac
Former-commit-id: 8ce461f1b48ff5e7c72cdcd3069dcee0960dbc8e
2021-07-03 22:29:55 +03:00
Michel Heily
86c35a2eb3 arm: do const-generics for BlockDataTransfer
Former-commit-id: d4be9648b334891de5a2daf3c2931cf8e31b337a
Former-commit-id: 6e7e54efd9fa3901008d2fab21dab4560d597763
2021-07-03 22:29:55 +03:00
Michel Heily
416cc2937b arm: do const-generics for HalfwordDataTransfer*
Former-commit-id: 891fd23bef3a4ecc7fe5a4012456d51fc91f8601
Former-commit-id: 431ac09cbf73078988d6400c6320a7fdadceef1a
2021-07-03 22:29:55 +03:00
Michel Heily
9819bf611d arm: convert some instructions to const-generics
Former-commit-id: 493127ef64f3d5e396e0391c5bb0db985cac8945
Former-commit-id: 987edb22cd27584dfdee0a23602df45424a6f4b8
2021-07-03 22:29:55 +03:00
Michel Heily
03d28c77b6 thumb: Finish converting all instructions to use const-generics
Former-commit-id: 671c75a985123a52b312a8ae5495ff545d7678dc
Former-commit-id: c0794ce36f410cd8c058cbe087c388a84aae8b85
2021-07-03 22:29:55 +03:00
Michel Heily
4a7eb53707 thumb: more const-generics :)
Former-commit-id: e869dafa68973d944be3b8d88d3238451b64718c
Former-commit-id: 8118d529e7a40303e4535f581ad4cf247b926b46
2021-07-03 22:29:55 +03:00
Michel Heily
9e6b787536 arm: convert more instructions to use const generics
Former-commit-id: bd4c802a49a8c37e6709c2481cc73367bbadade0
Former-commit-id: f3881e4f8fee1a7110cf676c3c62b6c39db88280
2021-07-03 22:29:55 +03:00
Michel Heily
7e96be21ae perf: Move pc to the beginning of the CPU struct
Former-commit-id: 1b17095bee5c6010d3792fc220a8abcf3a373207
Former-commit-id: 5e65dad6398ef6e9d907d086c982fd70e85c9184
2021-07-03 22:29:55 +03:00
Michel Heily
892dfbe395 More const generics..
Former-commit-id: 74e4c88128d8c83bbb23a874ba8e0821ffc583a7
Former-commit-id: 99ed5c5f73ba9ad2e95b9b190e0100d0e1b9e6a2
2021-07-03 22:29:55 +03:00
Michel Heily
0665ff7451 WIP 2 SingleDataTransfer
Former-commit-id: 8a103161f34eb1a6c731c63ae65ca1056117ec55
Former-commit-id: 74c8158e7354253f6bd4ad50488d34de34e3ad70
2021-07-03 22:29:55 +03:00
Michel Heily
b3c3c70bce WIP const generics
Former-commit-id: 2c38215fb57de66bfce26cfa7e61c460bd2954ac
Former-commit-id: 8fe5cc4fdc58b1155590dbfd6546b280fcdcc259
2021-07-03 22:29:55 +03:00
Michel Heily
626c5fa805 core: arm7tdmi: Fix new bug in LDR/STR introduced in b603904.
Of course only arm-wrestler caught it while mgba suite/eggvance did not :(


Former-commit-id: a5dcaa9b40c8a5a5d5fb1e531a601361869a041f
Former-commit-id: eb8d30a3c1cf9c39425b29e6d8386ac2b68a424b
2021-06-09 02:01:47 +03:00
Michel Heily
97704f2621 core: debugger: Fix traces
Former-commit-id: fbdaef86e2164ad1eeb5267041070958c024ceda
Former-commit-id: 643bcfe7ebccf77297d2371715490b3005e91d92
2021-06-09 02:01:42 +03:00
Michel Heily
f140e0f83b core: Fix broken debugger build
Former-commit-id: 0dcdb6d758e463eecc02faf5a0e7eff6c8c08899
Former-commit-id: 5e9d842158d573b10dc1ddb4c3621056282351ed
2021-06-09 01:08:42 +03:00
Michel Heily
20506091cc [perf] arm: Improve performance with barrel shifter.
Instead of using a struct member to hold the last barrel shifter carry output, which is expansive as it needs to be saved/loaded from memory, I now pass the carry around as an INOUT parameter.
Using perf anotate really shows high perctile of samples being spent on reading/writing `self.bs_carry_out`

Since this is a rather "surgical" changeset, I have made sure to run it against eggvance test suite, mGBA test suite and some games as well.

I actually saw better improvements than what the benchmark measured, but 7% is decent enough :)

```
run_60_frames           time:   [180.18 ms 180.45 ms 180.77 ms]
                        change: [-7.2464% -6.9081% -6.6324%] (p = 0.00 < 0.05)
                        Performance has improved.
```


Former-commit-id: 7cd7105a07aa0b78cab9dc8bbae3682b02b7ab7c
Former-commit-id: c68514beb3fa6c34f5f65544acbead21e527dbb0
2021-06-05 18:54:46 +03:00
Michel Heily
cb2b97e0c7 [perf] core: arm7tdmi: Re-arange some fields inside of CPU
Also, clean up some of the cfg(debug) mess

benchmark report:

run_60_frames           time:   [110.61 ms 111.01 ms 111.42 ms]
                        change: [-7.1171% -6.5425% -5.9132%] (p = 0.00 < 0.05)
                        Performance has improved.


Former-commit-id: 9cb82e483c8a78632d0deae20adca9fc1843a76b
Former-commit-id: 6d9be5ddaf72f2b9c02063fa067f2ffbaea4fdb6
2020-11-24 00:54:18 +02:00
Michel Heily
586a5bf16c core: arm7tdmi: Refactor display->disass.
Also, move core::disass into core::arm7tdmi::disass


Former-commit-id: 82f60cb814d6cf23e62565e34b61f8771e704525
Former-commit-id: 345ddaac674c78e77e62f106d7c0deda857fe5ed
2020-11-24 00:45:07 +02:00
Michel Heily
a413ebe891 [perf] core: arm7tdmi: inline arm7tdmi::Core::step function
run_60_frames           time:   [158.26 ms 160.84 ms 163.03 ms]
                        change: [-24.960% -18.808% -12.975%] (p = 0.00 < 0.05)
                        Performance has improved.

Wasn't expecting such an improvment tbh, but who am I to argue with results


Former-commit-id: a5ba74bffa26d962a232c0767a34a7d67ed8ccb4
Former-commit-id: 1b9b301ba9012e79e66822ac39af51df28c51fa4
2020-11-05 15:40:39 -08:00
Michel Heily
40e306349c core: arm7tdmi: Force address alignment in memory accesses
Fixes #148


Former-commit-id: 36f33c599cd9a3c51115bf20037bfdce9f581912
Former-commit-id: 24130ddb51ae3dff2c576289b74a8cbd7519593f
2020-10-23 01:31:58 +03:00
Michel Heily
6b8f4e8f51 core: Implement open bus (Reading from unused memory)
Former-commit-id: f0223556894a02ad1f85bb81abc18d47b7508445
Former-commit-id: e44b952867197467fa724022a05ba4579b1e2f03
2020-10-18 09:41:35 -07:00
Michel Heily
b003dc950f core: Implement bios read protection when CPU is not executing from bios.
Fixes #109
Fixes #106
Fixes MegaMan email menu freezing and probably some more games


Former-commit-id: ed37520f2bc732b07334261dfe3d23cccf3fc04c
Former-commit-id: d7f206b0f405ffe09a3b36d90268f1d683a64cea
2020-10-18 06:59:06 -07:00
Michel Heily
b6e2d55550 Everyday I'm ~~shuffeling~~ refactoring.
Some big refactors:
* improve scheduler performance by using a BinaryHeap
* refactor the scheduler API
* arm7tdmi
	* Change struct arm7tdmi::Core struct layout so frequently accesses fields would benefit from CPU cache
	* Simplify and cleanup cycle counting by implementing a MemoryInterface trait
	* Still not passing many cycle accuracy tests, but I believe it's because I don't have the prefetch buffer yet.
* Timer overflows are now scheduled
	* This fixes #111 and fixes #112
*


Former-commit-id: 17989e841a1ea88c2a7e14f4c99b31790a43c023
Former-commit-id: 109d98d824a464de347f6590a6ffe9af86b4b4ea
2020-10-17 06:36:02 -07:00
Michel Heily
dc7cd24e8d [perf] Refactor&Optimize inner core::arm7tdmi APIs.
Avoid passing ArmInstruction struct to handlers, as accesses to its fields can result in memory operations.


Former-commit-id: 6ea1719e36a0fefa1b30bdae4d6e8ab4dbf3af1a
Former-commit-id: e5855b8258f98d3f4c0819f3aec2fd0f47fef545
2020-10-10 11:08:26 -07:00
Michel Heily
879374a9b0 Refactor dir rustboyadvance-core -> core
Former-commit-id: 5af970f6d56d321472f2b91885e41ca113390986
Former-commit-id: 748e222a36362eb5ac8909068c32f2d3f98ca536
2020-05-30 13:43:37 +03:00